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DM8168 HDVICP2

HI :

     I designed two boards DM8168 use HDVICP2 encountered a problem!A project using the 8 bit VIN0 input, HDVICP2 can work normally,but  another project using VIN1 input, don't use the VIN0, HDVICP2 received data, no coding;Excuse me, is because of I  use VIN1 donot use VIN0?  Or software need to set what place? 

  • Hi user3823538,

    Do you use DM816x TI EVM or custom board? Do you use EZSDK 5.05.02.00?

    VIN[0] and VIN[1] (Video Input ports) are not related to HDVICP2, but to HDVPSS. See DM816x datasheet, section 9.10 HDVPSS and DM816x TRM, ch2 HDVPSS.

    Regards,
    Pavel

  • hi:

       thank you Before I problem described are clear enough

    We use VIP HDVPSS can receive data, the problem is HDVICP2 not to encode the data.

    Two different design, a design using a VIN [0], another design using VIN [1], the design HDVPSS VIN [0],HDVPSS can receive data,HDVICP working properly.

    So I don't know where is wrong.

  • user3823538,

    I think that your use case for VIN[0] is that you receive data on that port and transfer that data in DDR3 memory. Then HDVICP2 takes that data from DDR3, make encode, and transfer the encoded data back in DDR3. Can you confirm this is what you have for VIN[0]?

    Regarding VIN[1], the first thing to check is if you enable that port, make the pinmux and receive data on that port. See how VIN[0] is enabled and pinmux is set up.

    Regards,
    Pavel

  • hi

        I enable that port, make the pinmux and receive data on that port.    But HDVICP2 didn't work;   HDVICP don't code ,Another project of VIN [0] HDVICP2 can work;The project of the HDVICP2 VIN [1] can not work;

    I can also check what place?

  • Hi user3823538,

    Do you use DM816x TI EVM or custom board? Do you use EZSDK 5.05.02.00?

    What do you have connected on VIN[0] and VIN[1]? Do you use VIN[0]A or VIN[0]B? Do you have the data received by VIN[0] stored in DDR3? How exactly you verify all this?


    Regards,
    Pavel

  • hi
    I added the problem;8168DSP receives data, HDVPSS received the data, the M3 also receives data, But video M3 code failed.
  • hi

        tihan you  ;

                Our side to solve the problem, the FPGA is there to take the data there is a problem;Thank you very much for your help.Our side to solve the problem, the FPGA is there to take the data there is a problem;Thank you very much for your help.