C6678 PCIe host boot, issues with linking to DDR memory

Good evening,

I have implemented a PCIe host boot for our product the FMC667 a few years ago. We always been booting small codes on L2 SRAM. We are trying to do the same thing now but boot code on DDR3 instead. Of course the DDR3 memory controller needs to be initialized. I am attempting to populate the DDR3 memory controller address space in the linker script and I do have the right .c file with the values in there.

DDR3CFG: o = 00873500h   l = 00000100h

I do have a boot section mapped in low L2, and I have an assembly file jumping to c_int00. I have placed L2 beginning right after the boot area:

BOOT: o = 00800000h l = 00000100h

L2: o = 00800100h l = 00072CC0h

The assembly code run when the PCIe boot completes (located at 0x00800000) is

.ref _c_int00
.sect ".amaye"

nop 5
nop 5
b _c_int00
nop 5
nop 5

When my linker script targets DDR3 I do see some extra code added in L2 and I was hoping you guys can explain what this is about.

1 **************************

L2 linker script and map output

SECTIONS
{
.amaye > BOOT
.ddr3cfg > DDR3CFG
.csl_vect > L2
.text > L2
.stack > L2
.bss > L2
.cinit > L2
.cio > L2
.const > L2
.data > L2
.switch > L2
.sysmem > L2
.far > L2
.testMem > L2

}

SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.amaye 0 00800000 00000020
00800000 00000020 boot_4dsp.obj (.amaye)

.text 0 00800100 00008860
00800100 00000800 pll.obj (.text)
00800900 000005c0 rts6600_elf.lib : divd.obj (.text:__c6xabi_divd)

That's exactly what I expect. 

2 **************************

DDR3 linker script and map output

SECTIONS
{
.amaye > BOOT
.ddr3cfg > DDR3CFG
.csl_vect > DDR3
.text > DDR3
.stack > DDR3
.bss > DDR3
.cinit > DDR3
.cio > DDR3
.const > DDR3
.data > DDR3
.switch > DDR3
.sysmem > DDR3
.far > DDR3
.testMem > DDR3

}

SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.amaye 0 00800000 00000040
00800000 00000020 boot_4dsp.obj (.amaye)
00800020 00000020 rts6600_elf.lib : boot.obj ($Tramp$S$$_c_int00)

.ddr3cfg 0 00873500 00000070
00873500 00000070 ddr3cfg.obj (.ddr3cfg)

Would anyone know what this extra code added is? Should it run? Because obviously my code located at 0x80000000 will branch to c_int00 and this code will never be executed. At the end my boot does not work. Haven't debugged everything yet but I was hoping someone has pointers already!

Some unexpected code is being added to my .amaye section, should my main jump jump this "trampoline" instead of directly jumping to c_int00

Best Regards,

Arnaud