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Continuous Aintc interrupts on OMAPL138

Other Parts Discussed in Thread: OMAPL138

I am currently using CCSv4 connected to OMAPL138 via Spectrum Digital xds510usb emulator.

I have finally been able to get interrupts to vector correctly to the interrupt routine. The problem I now have is that I do not stop getting the same interrupt.

If I step through the code in the debugger, all works just fine.  One forced interrupt, one interrupt.

When I let it run freely,  as soon as I turn on interrupts in the ISR, I get the same interrupt.

This is the scenario.
Big Picture.
0)  Supervisor Mode, IRQ enabled, FIQ not.
1)  Force Interrupt by writing to AIC_SISR.
2)  Interrupt, vectors successfully,  IRQ mode, IRQ is disabled. I bit is set...
3) our code processes the ISR code in supervisor mode and then switches back to IRQ mode
4) switch to IRQ mode and exit back to where code was originally interrupted.

Note: this all works just fine, stepping through the debugger, slowly.

This is my problem though.
3).  When switching to Supervisor mode, Interrupts are also enabled, I Bit is cleared.
     Upon writing to msr to  Enable Interrupts and switch to SUPERVISOR Mode
    the aintc generates another interrupt and goes to same interrupt vector.
    The code has not processed the interrupt yet, nor has it cleared the pending status.
   This happens until the stack overflows.
            mrs         r14, CPSR
            bic         r14, r14, #I_BIT
            orr         r14, r14, #ARM_MODE_SVC
            msr         CPSR_c, r14

  I do clear the pending register,  I do write back to the HIPIR2 register to unlock PRHOLDMODE.
 I have tried a workaround to disable the current interrupt before switching to SUPER mode with  interrupts enabled and then reenable just before leaving the interrupt, but this does not work. I have tried to just exit in IRQ mode if HIPIR2 is 0x80000000 indicating no pending interrupt, but that does not work either because a valid forced interrupt does not set HIPIR2 any longer after I write to it the first time to unlock PRHOLDMODE.
 

Does anyone have any ideas on why when switching to ARM_MODE_SVC the aintc causes this interrupt to occur again?

Joe