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Way of the DDR2 compliance test when there is dumping resistance in DQS ?

shigehiro tsuda
Mastermind 9490 points
Other Parts Discussed in Thread: AM3874

Hi,

The circuit of our customer has dumping resistance between DDR2 and AM3874.
As for the DQS signal, what point is it right with to measure?
①The AM3874 side
②The DDR2 side

Best Regards,
Shigehiro Tsuda

  • 0
    TI__Guru**** 170625 points
    Hi Shigehiro,

    I am not sure what "dumping resistance" is. Is this an output message from the DDR2 compliance test? Can you provide more details?

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    Mastermind 9490 points

    Hi Pavel,

    Thank you for quick reply.

    I'm sorry. This word was wrong.
    mistake
    "dumping resistance"
    correct
    "damping resistor"

    Our customer measures the compliance test of DDR2 in the b side of the following figure.
    Is the measurement of which side of a or b correct on the compliance test of the DQS signal of DDR2?
    damping resistor:22ohm

    Best Regards,
    Shigehiro Tsuda

  • 0 in reply to shigehiro tsuda
    TI__Guru**** 170625 points
    Shigehiro,

    TI does not recommend using serial terminator (damping resistor) on DQS traces, thus I can not advice from which side you should measure.

    For more details refer to AM387x datasheet, sections:
    9.13.4.1.1.1 DDR2 Interface Schematic
    9.13.4.1.1.9 DDR2 Signal Termination

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    Mastermind 9490 points

    Hi Pavel,

    Thank you for quick reply.
    Our customer confirms even the following, but the wave pattern of DQS does not seem to change.
    damping resistor = 0 ohm

    They cannot change the direct connection because their product board is completed.
    They think that they do not have any problem in 0 ohm when they think about an electrical characteristic.

    I think that I do not have any problem when I refer to the following of AM3874 datasheet because the definition of DQS is min 0 ohm to max Z ohm.
    9.13.4.1.1.9 DDR2 Signal Termination

    Please tell me if this thought is wrong.

    Best Regards,
    Shigehiro Tsuda

  • 0 in reply to shigehiro tsuda
    TI__Guru**** 170625 points

    Shigehiro,

    shigehiro tsuda said:

    I think that I do not have any problem when I refer to the following of AM3874 datasheet because the definition of DQS is min 0 ohm to max Z ohm.
    9.13.4.1.1.9 DDR2 Signal Termination

    Please tell me if this thought is wrong.

    See note (5): No external terminations allowed for data byte net classes. ODT is to be used.

    ODT is internal termination (On-Die Termination). ODTs are integrated on the data byte net classes. They should be enabled to ensure signal integrity. For more info regarding ODT, see AM387x TRM, chapter 7 DDR2 and DDR3 Memory Controller

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Mastermind 9490 points

    Hi Pavel,

    Thank you for quick reply.

    I understood the reason of no external terminations from your detailed explanation.

    Thank you for your kindly and quick support.

    Best Regards,
    Shigehiro Tsuda