TMS320C6678: PASSCLK and MCMCLK

murad qahwash

Part Number: TMS320C6678
Other Parts Discussed in Thread: CDCM6208

Happy New Year All,

I am designing our own board based on the C6678L EVM. We are not planning to use the Hyperlink and we like to use only one CDCM6208 for clocking.

1- Is it safe to not provide MCMCLKP/N (hyperlink_CLKP/N) to pins (W2, Y2)?

2- Can we use the core clock for the PASSCLK and not provide PASSCLKP/N to pins (AJ5, AJ4)...this can be done by setting BM_GPIO = 010

If this is OK, then only clock to the DSP will be: CORECLK, DDRCLK, SRIOSGMIICLK, PCIECLK

I know Ketstone1 has issue with the PLL and hence IBL was introduced and I want to make sure not providing the MCMCLK and EXTERNAL PASSCLK is not an issue!

Regards,

Murad

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi Murad,

I've notified the hw team. Their feedback will be posted here.

Best Regards,
Yordan

0 Bill Taboada over 8 years ago

TI__Mastermind 42545 points

Hi Murad,
If the Hyperlink interface is not used then the MCMCLK is not needed and can be terminated as directed in the Hardware Design Guide. If you want to use the core clock as the clock input to the PASS PLL, you need to pull the PACLKSEL pin low and terminate the PASSCLK pins. I think the issue you are referenceing is described in usage note 17 of the errata document. This refers to the selection of the clock to the NETCP from either the sysclk1 or the output of the PASS PLL. This shouldn't be effected by the source clock for the PLL and should be implemented as described in the errata.
Regards,
Bill

0 murad qahwash over 8 years ago in reply to Bill Taboada

Genius 3770 points

Thanks Bill for the prompt response and clarification!

Regards,

Murad

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TMS320C6678: PASSCLK and MCMCLK