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AM5728: EMIF configuration problem

user4759774
Intellectual 745 points
Part Number: AM5728
Other Parts Discussed in Thread: AM5718,

Dear All,

I do have a problem with EMIF and SDRAM memory configuration. The memory is built with 4 ICs - 256Mb x 8bit each (common CS, connected to EMIF1), AM57x8 uses 32 bits for data transfer (x32 memory config).

The ECC is disabled (for now).

I do encounter some errors on Most Significant Byte [MSB] of the read/written memory word:

1. When I write 0x00000000 to memory location by using JTAG debugging tool:

#0>mm 0x80000000 0x00000000 32
#0>md 0x80000000 40
80000000 : 0x94000000 -1811939328 ....
80000004 : 0x94000000 -1811939328 ....
80000008 : 0x00000000 0 ....
8000000c : 0x00000000 0 ....
80000010 : 0x00000000 0 ....
80000014 : 0x00000000 0 ....
80000018 : 0x00000000 0 ....
8000001c : 0x00000000 0 ....
80000020 : 0x16000000 369098752 ....
80000024 : 0x16000000 369098752 ....
80000028 : 0x00000000 0 ....
8000002c : 0x00000000 0 ....
80000030 : 0x00000000 0 ....
80000034 : 0x00000000 0 ....
80000038 : 0x00000000 0 ....
8000003c : 0x00000000 0 ....
80000040 : 0x30000000 805306368 ...0
80000044 : 0x30000000 805306368 ...0
80000048 : 0x00000000 0 ....
8000004c : 0x00000000 0 ....
80000050 : 0x00000000 0 ....
80000054 : 0x00000000 0 ....
80000058 : 0x00000000 0 ....
8000005c : 0x00000000 0 ....
80000060 : 0x83000000 -2097152000 ....
80000064 : 0x83000000 -2097152000 ....
80000068 : 0x00000000 0 ....
8000006c : 0x00000000 0 ....
80000070 : 0x00000000 0 ....
80000074 : 0x00000000 0 ....
80000078 : 0x00000000 0 ....
8000007c : 0x00000000 0 ....

2. When I do write 0xFF000000 I also see some wrong values:

#0>mm 0x80000000 0xFF000000 32
#0>md 0x80000000 40
80000000 : 0x94000000 -1811939328 ....
80000004 : 0x94000000 -1811939328 ....
80000008 : 0xff000000 - 16777216 ....
8000000c : 0xff000000 - 16777216 ....
80000010 : 0xff000000 - 16777216 ....
80000014 : 0xff000000 - 16777216 ....
80000018 : 0xff000000 - 16777216 ....
8000001c : 0xff000000 - 16777216 ....
80000020 : 0x16000000 369098752 ....
80000024 : 0x16000000 369098752 ....
80000028 : 0xff000000 - 16777216 ....
8000002c : 0xff000000 - 16777216 ....
80000030 : 0xff000000 - 16777216 ....
80000034 : 0xff000000 - 16777216 ....
80000038 : 0xff000000 - 16777216 ....
8000003c : 0xff000000 - 16777216 ....
80000040 : 0x30000000 805306368 ...0
80000044 : 0x30000000 805306368 ...0
80000048 : 0xff000000 - 16777216 ....
8000004c : 0xff000000 - 16777216 ....
80000050 : 0xff000000 - 16777216 ....
80000054 : 0xff000000 - 16777216 ....
80000058 : 0xff000000 - 16777216 ....
8000005c : 0xff000000 - 16777216 ....
80000060 : 0x83000000 -2097152000 ....
80000064 : 0x83000000 -2097152000 ....
80000068 : 0xff000000 - 16777216 ....
8000006c : 0xff000000 - 16777216 ....
80000070 : 0xff000000 - 16777216 ....
80000074 : 0xff000000 - 16777216 ....
80000078 : 0xff000000 - 16777216 ....
8000007c : 0xff000000 - 16777216 ....

EMIF1 is configured to work with DDR3-1333 @ 666MHz (CLKOUT shows  that EMIF1_PHY_CLK has correct value).

Errors on MSB also pop up for slower DDR clock rates (up to DDR3-800 configuration).

The really strange thing is that when I switch memory to 16 bit width of data bus (x16) at sdram_config register the memory works correctly (board boots linux and works without hangs).

On the beginning I thought that impedance matching is wrong, but I've double check PART4A settings (ddr1_d[31:24]) and those are identical to ones for working data lines.

EMIF1 has been setup according to sprac36 app note (). All inserted values were correct according to DDR3 standards (green fields on the sheet). 

Hints for further investigation are more than welcome :-)

Have anybody experienced similar issue?

Best regards,

Lukasz

  • 0
    TI__Guru**** 393215 points
    Hi,

    Is this a single board, or do you see the same issue on multiple boards?
  • 0 in reply to Biser Gatchev-XID
    Intellectual 745 points
    Hi,

    I do see this problem on several boards with different processors (both AM5728 and AM5718).
    For example on board with AM5718:
    #0>mm 0x80000000 0x00000000 32
    #0>md 0x80000000 32
    80000000 : 0xc8000000 - 939524096 ....
    80000004 : 0xc8000000 - 939524096 ....
    80000008 : 0x00000000 0 ....
    8000000c : 0x00000000 0 ....
    80000010 : 0x00000000 0 ....
    80000014 : 0x00000000 0 ....
    80000018 : 0x00000000 0 ....
    8000001c : 0x00000000 0 ....
    80000020 : 0x0a000000 167772160 ....
    80000024 : 0x0a000000 167772160 ....
    80000028 : 0x00000000 0 ....
    8000002c : 0x00000000 0 ....
    80000030 : 0x00000000 0 ....
    80000034 : 0x00000000 0 ....
    80000038 : 0x00000000 0 ....
    8000003c : 0x00000000 0 ....
    80000040 : 0x2b000000 721420288 ...+
    80000044 : 0x2b000000 721420288 ...+
    80000048 : 0x00000000 0 ....
    8000004c : 0x00000000 0 ....
    80000050 : 0x00000000 0 ....
    80000054 : 0x00000000 0 ....
    80000058 : 0x00000000 0 ....
    8000005c : 0x00000000 0 ....
    80000060 : 0x20000000 536870912 ...
    80000064 : 0x20000000 536870912 ...
    80000068 : 0x00000000 0 ....
    8000006c : 0x00000000 0 ....
    80000070 : 0x00000000 0 ....
    80000074 : 0x00000000 0 ....
    80000078 : 0x00000000 0 ....
    8000007c : 0x00000000 0 ....

    BR,
    Łukasz
  • 0 in reply to user4759774
    TI__Guru**** 393215 points
    It seems to me that there is some wrong value in your DDR setup. Can you post the Excel spreadsheet with your data, and the DDR datasheet?
  • 0 in reply to Biser Gatchev-XID
    Intellectual 745 points

    Hi Biser,

    Please find attached DDR3 memory datascheet and my modified xlsm file.

    `ddr_xlsm_pdf.tar.gz

    Thanks for support.

    Best regards,

    Łukasz

  • 0 in reply to user4759774
    TI__Guru**** 393215 points
    Lukasz,

    From what I see you use a 1600 speed grade memory. You should enter the timing parameters for this speed grade, not for the actual data rate used (1333). Please try it and let me know.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 745 points

    Hi,

    In the SPRUHZ6G, page 3250 there is an overview of EMIF capabilities. There are CAS grades but no info about maximal memory speed.

    Also, the DDR3 memory is backward compatible up to 800 MHz operation.

    But, no problem - I will setup 800 MHz EMIF clock and test if this memory works as DDR3@1600. 

    Thanks for support,

    Łukasz

  • 0 in reply to user4759774
    TI__Guru**** 393215 points
    You don't seem to understand. The EMIF speed you have set is OK. You just need to enter the DDR datasheet parameters for the 1600 speed grade you have on your board. The spreadsheet will calculate the correct settings for 1333.
  • 0 in reply to Biser Gatchev-XID
    TI__Genius 17387 points

    Hi Biser,

    Today I've been at the customer and we did some debugging. In the Excel sheet we have entered the parameters from the 1600 speed grad DDR part. We tried the EMIF at 400 and 666 MHz (via uboot). But with both settings there are problems with the upper byte of the 32 bit EMIF interface. This is how the memory looks like in CCS after filling with 0xffffffff:

    When using the GEL file from the AM5718 IDK on the customer board, the EMIF seems to work fine if DDR is configured for 400 MHz. But when using a higher speed than 400 via the GEL, the memory error is back. So it looks like the HW is OK, only a config issue.

    Here the output of the GEL function print_hw_leveling_output_EMIF1:

    CortexA15_0: GEL Output: EMIF_PHY_FIFO_WE_SLAVE_RATIO Macro 0: 0x00000087
    CortexA15_0: GEL Output: EMIF_PHY_FIFO_WE_SLAVE_RATIO Macro 1: 0x00000089
    CortexA15_0: GEL Output: EMIF_PHY_FIFO_WE_SLAVE_RATIO Macro 2: 0x00000090
    CortexA15_0: GEL Output: EMIF_PHY_FIFO_WE_SLAVE_RATIO Macro 3: 0x000000E6
    CortexA15_0: GEL Output: EMIF_PHY_FIFO_WE_SLAVE_RATIO Macro 4: 0x000000BA
    CortexA15_0: GEL Output:
    CortexA15_0: GEL Output: EMIF_PHY_RD_DQS_SLAVE_RATIO  Macro 0: 0x00000000
    CortexA15_0: GEL Output: EMIF_PHY_RD_DQS_SLAVE_RATIO  Macro 1: 0x00000000
    CortexA15_0: GEL Output: EMIF_PHY_RD_DQS_SLAVE_RATIO  Macro 2: 0x00000000
    CortexA15_0: GEL Output: EMIF_PHY_RD_DQS_SLAVE_RATIO  Macro 3: 0x00000000
    CortexA15_0: GEL Output: EMIF_PHY_RD_DQS_SLAVE_RATIO  Macro 4: 0x00000000
    CortexA15_0: GEL Output:
    CortexA15_0: GEL Output: EMIF_PHY_WR_DATA_SLAVE_RATIO Macro 0: 0x0000006B
    CortexA15_0: GEL Output: EMIF_PHY_WR_DATA_SLAVE_RATIO Macro 1: 0x00000074
    CortexA15_0: GEL Output: EMIF_PHY_WR_DATA_SLAVE_RATIO Macro 2: 0x0000007D
    CortexA15_0: GEL Output: EMIF_PHY_WR_DATA_SLAVE_RATIO Macro 3: 0x000000C6
    CortexA15_0: GEL Output: EMIF_PHY_WR_DATA_SLAVE_RATIO Macro 4: 0x00000089
    CortexA15_0: GEL Output:
    CortexA15_0: GEL Output: EMIF_PHY_WR_DQS_SLAVE_RATIO  Macro 0: 0x0000004B
    CortexA15_0: GEL Output: EMIF_PHY_WR_DQS_SLAVE_RATIO  Macro 1: 0x00000054
    CortexA15_0: GEL Output: EMIF_PHY_WR_DQS_SLAVE_RATIO  Macro 2: 0x0000005D
    CortexA15_0: GEL Output: EMIF_PHY_WR_DQS_SLAVE_RATIO  Macro 3: 0x000000A6
    CortexA15_0: GEL Output: EMIF_PHY_WR_DQS_SLAVE_RATIO  Macro 4: 0x00000069
    CortexA15_0: GEL Output:

    Is it expected that all EMIF_PHY_RD_DQS_SLAVE_RATIO values are 0? Also in the Excel sheet the RD leveling seems to be disabled. Why?

    Thanks,
      Robert

  • 0 in reply to Robert Finger
    TI__Guru**** 393215 points
    I have notified the DDR experts about this. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 745 points
    Hi Biser,

    Is there any response from EMIF experts?

    I've double checked leveling and the above pattern is visible with RW/WR leveling performed.

    Without it - the EMIF_READ_WRITE_LEVELING_RAMP_CONTROL (0x4C00 00D8) RDWRLVL_EN bit clear - there is "random" output.


    Best regards,
    Łukasz
  • 0 in reply to user4759774
    TI__Guru**** 393215 points
    Hi Lukasz,

    Robert Finger is in direct contact with the factory team now. I believe he can update you on progress.
  • 0 in reply to Biser Gatchev-XID
    TI__Genius 17387 points
    We found the root cause. In the layout two pins have been swapped, causing incorrect addressing for one of the DDR3 devices.

    Thanks for your help!!
  • 0 in reply to Robert Finger
    TI__Guru**** 393215 points
    Glad to hear this! Thanks for updating the thread.