XEVMK2EX: How EVM is meeting clock jitter requirements of K2E SoC

Tarang Jindal68

Part Number: XEVMK2EX

Hello,

According to SoC, Random Jitter requirement for most of the interfaces is below 4ps RMS.

EVM has used CDCM6208V1RGZT clock generator to source the clocks for SoC. The ref clock for this clock source is a 25MHz oscillator.

According to 25MHz Osc specs, osc has 5ps RMS jitter.

if EVM is using a 5ps RMS noisy ref clock osc. and clock source is used in synthesized mode, so, how are you meeting the jitter requirement of SoC with this set up.

Thanks and Regards

Tarang Jindal

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

I've forwarded this to the hw experts.

Best Regards,
Yordan

0 Tom Johnson 16214 over 8 years ago in reply to Yordan Kovachev

TI__Mastermind 46460 points

Tarang,

The K2E EVM uses the CDCM6208 to generate the reference clock signals for the SOC PLLs and the SERDES reference clock inputs. The CDCM6208 is a Low Jitter Clock Generator including a Jitter Cleaner that is specifically designed to generate clocks compliant with SERDES reference clock requirements. Please refer to its documentation.

Tom

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XEVMK2EX: How EVM is meeting clock jitter requirements of K2E SoC