Tool/software: Linux
Hello,
I am working on custom design with 4GB DDR, 2GB each EMIF interface. but it show only 2GB in uboot and kernel.
SDK - AM57x PSDK 3.01.00.06:
I am referring some e2e threads:
https://e2e.ti.com/support/embedded/linux/f/354/p/561709/2060012#2060012
https://e2e.ti.com/support/arm/sitara_arm/f/791/t/464238
https://e2e.ti.com/support/arm/automotive_processors/f/1020/t/552861
I have made lisa and timing changes in u-boot as per my DDR calculated using excel sheet. and update "board/ti/am57xx/board.c"
IT is mentioned i need to do following steps:
- Enable ARM LPAE support in the kernel
- Configure the MPU Memory Adapter to enable high memory interleaving
- Configure the MPU Memory Adapter/DMM LISA map sections
I have updated the Lisa and enabled the LPAE support in kernel, but how i will enable the "MPU Memory Adapter to enable high memory interleaving"
What else i am missing ? am i need to change the base address with reference to "board/ti/dra7xx/evm.c"
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 7165ef8..484da5a 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -34,6 +34,7 @@
#include "../common/board_detect.h"
#include "mux_data.h"
+
#define board_is_x15() board_ti_is("BBRDX15_")
#define board_is_x15_revb1() (board_ti_is("BBRDX15_") && \
(strncmp("B.10", board_ti_get_rev(), 3) <= 0))
@@ -44,6 +45,9 @@
#define board_is_am572x_idk() board_ti_is("AM572IDK")
#define board_is_am571x_idk() board_ti_is("AM571IDK")
+#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
+ board_ti_get_emif2_size()
+
#ifdef CONFIG_DRIVER_TI_CPSW
#include <cpsw.h>
#endif
@@ -74,17 +78,24 @@ const struct omap_sysinfo sysinfo = {
};
static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
- .dmm_lisa_map_3 = 0x80740300,
- .is_ma_present = 0x1
+.dmm_lisa_map_0 = 0x0,
+.dmm_lisa_map_1 = 0x0,
+.dmm_lisa_map_2 = 0x80740300,
+.dmm_lisa_map_3 = 0xFF020100,
+.is_ma_present = 0x1
};
static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = {
- .dmm_lisa_map_3 = 0x80640100,
- .is_ma_present = 0x1
+.dmm_lisa_map_0 = 0x0,
+.dmm_lisa_map_1 = 0x0,
+.dmm_lisa_map_2 = 0x80740300,
+.dmm_lisa_map_3 = 0xFF020100,
+.is_ma_present = 0x1
};
void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
{
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
if (board_is_am571x_idk())
*dmm_lisa_regs = &am571x_idk_lisa_regs;
else
@@ -92,28 +103,50 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
}
static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61851b32,
- .sdram_config = 0x61851b32,
- .sdram_config2 = 0x08000000,
+/* .sdram_config_init = 0x61873BB2,
+ .sdram_config = 0x61873BB2,
+ .sdram_config2 = 0x00000000,
.ref_ctrl = 0x000040F1,
.ref_ctrl_final = 0x00001035,
- .sdram_tim1 = 0xcccf36ab,
- .sdram_tim2 = 0x308f7fda,
- .sdram_tim3 = 0x409f88a8,
+ .sdram_tim1 = 0xCEEF266B,
+ .sdram_tim2 = 0x30BF7FDA,
+ .sdram_tim3 = 0x407F8BA8,
.read_idle_ctrl = 0x00050000,
- .zq_config = 0x5007190b,
+ .zq_config = 0x5007190B,
.temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0024400b,
- .emif_ddr_phy_ctlr_1 = 0x0e24400b,
- .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
- .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
- .emif_ddr_ext_phy_ctrl_4 = 0x009b009b,
- .emif_ddr_ext_phy_ctrl_5 = 0x009e009e,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400F,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400F,
+ .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x006B00A2,
+ .emif_ddr_ext_phy_ctrl_3 = 0x006B00A2,
+ .emif_ddr_ext_phy_ctrl_4 = 0x006B00A6,
+ .emif_ddr_ext_phy_ctrl_5 = 0x006B00A6,
.emif_rd_wr_lvl_rmp_win = 0x00000000,
.emif_rd_wr_lvl_rmp_ctl = 0x80000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
+ .emif_rd_wr_exec_thresh = 0x00000305*/
+ .sdram_config_init = 0x61851ab2,
+ .sdram_config = 0x61851ab2,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x30BF7FDA,
+ .sdram_tim3 = 0x427F8BA8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
};
/* Ext phy ctrl regs 1-35 */
@@ -156,7 +189,30 @@ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {
};
static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61851b32,
+/* .sdram_config_init = 0x61873BB2,
+ .sdram_config = 0x61873BB2,
+ .sdram_config2 = 0x00000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCEEF266B,
+ .sdram_tim2 = 0x30BF7FDA,
+ .sdram_tim3 = 0x407F8BA8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x5007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400F,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400F,
+ .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x006B009B,
+ .emif_ddr_ext_phy_ctrl_3 = 0x006B009A,
+ .emif_ddr_ext_phy_ctrl_4 = 0x006B0091,
+ .emif_ddr_ext_phy_ctrl_5 = 0x006B0090,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+*/
+/* .sdram_config_init = 0x61851b32,
.sdram_config = 0x61851b32,
.sdram_config2 = 0x08000000,
.ref_ctrl = 0x000040F1,
@@ -177,7 +233,30 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
.emif_rd_wr_lvl_rmp_win = 0x00000000,
.emif_rd_wr_lvl_rmp_ctl = 0x80000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
+ .emif_rd_wr_exec_thresh = 0x00000305*/
+ .sdram_config_init = 0x61851B32,
+ .sdram_config = 0x61851B32,
+ .sdram_config2 = 0x08000000,
+ .ref_ctrl = 0x000040F1,
+ .ref_ctrl_final = 0x00001035,
+ .sdram_tim1 = 0xCCCF36B3,
+ .sdram_tim2 = 0x308F7FDA,
+ .sdram_tim3 = 0x427F88A8,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x0007190B,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1_init = 0x0024400B,
+ .emif_ddr_phy_ctlr_1 = 0x0E24400B,
+ .emif_ddr_ext_phy_ctrl_1 = 0x10040100,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00910091,
+ .emif_ddr_ext_phy_ctrl_3 = 0x00950095,
+ .emif_ddr_ext_phy_ctrl_4 = 0x009B009B,
+ .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000305
+
};
static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
@@ -218,8 +297,26 @@ static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
0x0
};
+
+/*void dram_init_banksize(void)
+{
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
+ u64 ram_size;
+
+ ram_size = board_ti_get_emif_size();
+
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = get_effective_memsize();
+ if (ram_size > CONFIG_MAX_MEM_MAPPED) {
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);*/
+/* gd->bd->bi_dram[1].start = 0x200000000;
+ gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
+ }
+}*/
+
void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
{
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
switch (emif_nr) {
case 1:
*regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
@@ -232,6 +329,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
{
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
switch (emif_nr) {
case 1:
*regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
@@ -360,6 +458,7 @@ static inline void setup_board_eeprom_env(void) { }
void do_board_detect(void)
{
int rc;
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS);
@@ -374,6 +473,7 @@ void do_board_detect(void)
{
char *bname = NULL;
int rc;
+ printf("++++zeiss debug %s Line %d \n", __func__,__LINE__);
rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS);
@@ -390,8 +490,11 @@ void do_board_detect(void)
bname = "AM571x IDK";
if (bname)
+ {
snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
"Board: %s REV %s\n", bname, board_ti_get_rev());
+ printf( "Board: %s REV %s\n", bname, board_ti_get_rev());
+ }
}
static void setup_board_eeprom_env(void)
@@ -897,7 +1000,7 @@ int board_eth_init(bd_t *bis)
eth_setenv_enetaddr("ethaddr", mac_addr);
}
- mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
+/* mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
@@ -910,7 +1013,7 @@ int board_eth_init(bd_t *bis)
if (is_valid_ethaddr(mac_addr))
eth_setenv_enetaddr("eth1addr", mac_addr);
}
-
+*/
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
ctrl_val |= 0x22;
writel(ctrl_val, (*ctrl)->control_core_control_io1);
Please let me know the required change.
Thanks & Regards,
Shweta.
