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TMS320C6657: VREF for DDR3....conflicting verbage between documents.

paul kerstetter
Intellectual 455 points
Part Number: TMS320C6657
Other Parts Discussed in Thread: TPS51200

pg 17 of

DDR3 Design Requirements for KeyStone Devices read as follows:

Limitations on DC voltage tolerance and AC noise for all reference voltages is well

defined in the applicable JEDEC standard (pg. 129 of JESD79-3C). Strict conformity to

these limitations is important to help ensure proper functionality of the DDR3 SDRAM

interface. The Vref tolerance is ・}1% or VDD/2 ・}1%, which equates to

0.7425 V – 0.7575 V. To achieve this tight tolerance, it is recommended (when using a

standard resistor divider network) that better than 1% tolerance components be used.

 

But upon looking at the data sheet

SPRS814C –MARCH 2012–REVISED MAY 2016

pg 36 for the device it reads:


VREFSSTL DDR3 reference voltage 0.49 × DVDD15 0.5 × DVDD15 0.51 × DVDD15 V


The data sheet gives more relaxinf requiremetns!

 

I think I read somewhere that the data sheet overules the other documents.....Im using the TPS51200 termination supply which gives the tolerance for refout as   0.75 V plus or minus 15 mV which meets the data sheet requirements but not  the other document requirements....

 

Is the TPS51200 ok to use?

 

 

  • 0
    TI__Guru*** 125430 points

    paul kerstetter said:

    The Vref tolerance is ・}1% or VDD/2 ・}1%, which equates to

    0.7425 V – 0.7575 V.

    Not quite.  The JEDEC spec is +/-1% of VDD.  Your calculation is based on VREF which is VDD/2.  So you should instead be using +/-15mV for DDR3 and +/-13.5mV for DDR3L.

    There's also an AC spec governing "temporary deviations", and this can be another +/-1% (of VDD).

    For the TPS51200 note that REFOUT is typically equal to REFIN.  So even with the TPS51200 you still need to be using 1% resistors when supplying REFIN.  That's what will set your DC level.  The "deviations" of the TPS51200 are +/-12mV which satisfies the AC spec for both DDR3 and DDR3L.

    So, yes, TPS51200 is fine to use as long as you're still using 1% resistors when supplying REFIN.

  • 0 in reply to Brad Griffis
    Intellectual 455 points

    ok i see that REFOUT voltage tolerance to VREFIN for the TPS51200 is plus or minus 12 mV in the data sheet....

    When you said "you still need to be using 1% resistors when supplying REFIN" did you mean better than 1%?  Like 0.1%?   This would seem to be the case as the TPS data sheet has no requirements for VREFIN.  For example using 1% resistors 1.5V *10K /(20K) = 0.75 V= Vrefin ,  1.5V*10.1K/(20K) = 0.7575 V,  1.5V*9.9KK/(20K)=0.7425,  Which is plus or minus 7.5 mV due to 1% variation for resistors (and not even considering temp effects), but then since REFOUT  tolerance to REFIN is plus or minus 12 mV then the actual variation on REFIN would be plus or minus 19.5 mV  (12 mV + 7.5 mV).     1% vsriotion of Vdd = 1.5 V is  plus or minus 15 mV or the variation around 0.75 V is plus or minus 7.5 mV

    Also  DDR3 Design Requirements for KeyStone Devices document. recommended better than !% resistors.....

    It is still interesting that the tms 320 data sheet states min and max requirements for the ref in voltage as ......

    VREFSSTL DDR3 reference voltage 0.49 × DVDD15 0.5 × DVDD15 0.51 × DVDD15 V    Page 36

    In other words:  1.5V * 0.49 = 0.735 Min and 1.5V*0.51 = 0.765V Max

    Which means it is more lenient then the Jedec requirement hence being compatible with the Jedec requirement.    The Jedec requirement is for the DDR3 supply which is what is mentioned in the  DDR3 Design Requirements for KeyStone Devices document.

    Thanks for your answer.

  • 0 in reply to paul kerstetter
    TI__Guru*** 125430 points

    paul kerstetter said:
    When you said "you still need to be using 1% resistors when supplying REFIN" did you mean better than 1%?  Like 0.1%?

    No.

    paul kerstetter said:
    Also  DDR3 Design Requirements for KeyStone Devices document. recommended better than !% resistors.....

    It is wrong for the reason I previously explained.  1% resistors are fine.

    paul kerstetter said:

    It is still interesting that the tms 320 data sheet states min and max requirements for the ref in voltage as ......

    VREFSSTL DDR3 reference voltage 0.49 × DVDD15 0.5 × DVDD15 0.51 × DVDD15 V    Page 36

    In other words:  1.5V * 0.49 = 0.735 Min and 1.5V*0.51 = 0.765V Max

    That's exactly the same as JEDEC standard, i.e. +/-1% of VDD.

  • 0 in reply to Brad Griffis
    Intellectual 455 points

    Ok so the document is wrong

    Any way thanks for your help, I'm done with this post and made my design decisions.