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Voice CODEC usage

Yulin
Expert 1625 points


Hi there,

Please help to clarify the following usage of DM365 voice CODEC:

1. In page 13 of sprufi9a.pdf, "Make sure the ADC module is in reset by clearing the RSTADC".
   In page 18 of sprufi9a.pdf, "ADC reset will be asserted during RSTADC = 1".
   Which one is correct ?

2. Except for power off and/or reset the voice CODEC, how to stop it from issing VCREVT/VCXEVT to EDMA ?

3. Right sequence of manipulating individual bits of VC_CTRL. Such as:
   Is RFIFOEN=1 required before RFIFOMD/RFIFOCL be set/cleared ?
   or
   RFIFOMD/RFIFOCL must be set/cleared before RFIFOEN is set ?

Thanks in advance.

  • 0
    TI__Expert 5955 points

    Hi,

    This is what I think. I will let you know if otherwise.

    1. The information described in page 13 is correct. ADC is out of reset when the RSTADC bit is set to 1.

    2. Those are the only ways.

    3. RFIFOEN=1 is required before the RFIFOMD/RFIFOCL can be set/cleared.

    Thanks,

    Tai Nguyen

  • 0
    TI__Expert 5955 points

    Hi Yulin,

    I got some correction/info to share with you.

    1. The proper steps to reset the ADC is write a 0 and then write a 1 to the RSTADC.

    2. You can also stop it from issuing the VCREVT/VCXEVT to EDMA by clearing the WFIFOMD/WFIFOEN/RFIFOMD/RFIFOEN bits.

    3. xFIFOEN bit should be set at the same time or after xFIFOMD,xFIFOCL be set/cleared.

    Sorry for the confusion.

    Thanks,

    Tai Nguyen

  • 0 in reply to Tai Nguyen
    Expert 1625 points

    Hi Tai Nguyen,

    My tests show different results:
    1. Whether RSTADC is 0 or 1, it is always converting.
    2. RFIFOEN/WFIFOEN have nothing to do with VCREVT/VCXEVT.
    3. The effect is not perceivable.

    Is there any non-OS silicon verification code to show the detail and effects ?

    Yulin