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AM5728: DSP cannot access PRU instruction memory

Doug Kim
Intellectual 300 points

Part Number: AM5728

Hi ,  I am trying to download PRU program C66x DSP to PRU using csl library in AM5728.

   handle = PRUICSS_create(cfg,pru_num);

I cannot run this fuction because C66x DSP cannot access L3_MAIN space for PRU-ICSS (0x4B23_4000).

I guess I didnot initialize some interconnection or clk enable register.

Following is my current initialization information

           address               value

         0x4A00_98FC        0x00017102

0x4A00_9718        0x0000_0002

0x4A00_9720        0x0000_0002

I cannot change memory value using Memory Brower in Code composer Studio.

        0x4B23_4000 (PRU IRAM Global address)  0x0000_0000    <-- cannot change this value using Memory browerser.

I believe DSP cannot access PRU instruction memory at this time.

How can I access PRU IRAM memory using L4_CFG interconnect and PRU-ICSS interface slave port?

 If somebody have a example code for this please let me know.

Doug

  • 0
    TI__Guru**** 393215 points
    Hi,

    What software are you using?
  • 0 in reply to Biser Gatchev-XID
    Intellectual 300 points
    Code Composer Studio

    Version: 6.2.0.00050
  • 0 in reply to Biser Gatchev-XID
    Intellectual 300 points
    I need to download PRU program and from C66xx DSP in non-OS environment at this time. I can upload each PRU progam CCS debug mode and run ok, but I need to manage quad PRU core using C66xx DSP. In this case I guess I need to set L3, and L4_CFG register for PRU memory access. If anybody have a example code for these case, please reply for me.
  • 0 in reply to Doug Kim
    TI__Genius 15970 points

    Hi Doug,

    The DSP can access the PRU instruction RAM.  A couple suggestions to try:

    1.  Make sure to initialize the PRU clock by executing the following (copied from AM572x_multicore_reset.gel):

    WR_MEM_32(0x4a009718, 0x0); //PRUSS_1_CLKCTRL
    WR_MEM_32(0x4a009720, 0x0); //PRUSS_2_CLKCTRL

    WR_MEM_32(0x4a009718, 0x2); //PRUSS_1_CLKCTRL
    WR_MEM_32(0x4a009720, 0x2); //PRUSS_2_CLKCTRL

    2.  If the DSP is trying to access the PRU Instruction RAM, make sure the PRU is not running.  The IRAM becomes locked when the PRU is executing code, and other cores cannot access this memory space.

    Also, here's a quick test to check that the DSP is configured correctly to access PRU memory in CCS:

    1. Connect to CortexA15_0 core
    2. Click on CortexA15_0 core
    3. Run the following GEL file script under the "Scripts" drop down menu:  Scripts -> AM572x MULTICORE Initialization -> AM572x_MULTICORE_EnableAllCores
    4. Connect to C66xx_DSP core
    5. Write to 0x4B234000 in DSP's Memory Browser

    Regards,

    Melissa

  • 0 in reply to melissaw
    Intellectual 300 points
    Hi Melissa,

    Thank you very much for your kind reply. I sucessfully access from CortexA15_0 core, but I cannot access from DSP core same way.
    I got following message,

    CortexA15_0: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4A0025F4

    at (*((unsigned int *) 0x4A0025F4)&0xFFF) [AM572x_startup_common.gel:69]

    at AM57xx_EVM_Initialization(0) [gpevm_am572x_mih0201.gel:54]

    at OnTargetConnect()

    I believe this GEL file is for CortexA15. Do you have same function GEL file for DSP core?
    finally, I need to access from DSP side.

    Best regards,
    Doug