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Linux/AM5728: Disable MPU Interrupts

Gerard
Expert 1290 points
Part Number: AM5728


Tool/software: Linux

By default MPU_IRQ_121 is tied to GPIO8_IRQ_1 from the IRQ crossbar. I want to ensure the MPU does *not* receive the interrupt from GPIO8_IRQ_1.

I'm looking for some guidance as to the easiest way to accomplish that - I'm hoping that I'm missing something obvious in the device tree that will allow me to break that default mapping.

Thanks

  • 0
    TI__Guru 65405 points
    Hi Gerard,

    You can disable/enable MPU_IRQ_121 by configuring WKG_ENB_FOR_INTR121 bit of WKG_ENB_D_1 register. For detailed description check AM572x TRM Table 4-75. WKG_ENB_D_1 at:
    www.ti.com/.../spruhz6h.pdf

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    Expert 1290 points
    Thank you - I was more looking for an easy way to do that disable/enable via the device tree.

    Since I'm using the AM5728 I had been browsing through options within dra7.dtsi/dra74x.dtsi. Thus far I'm not sure that options within the "crossbar_mpu" will accomplish that.

    Thanks
  • 0 in reply to Cvetolin Shulev-XID
    Expert 1290 points
    In addition to being interested in a simple mechanism (ie. the device tree) to modify the interrupt configuration I'm curious as to the suggestion to use WKG_ENB_D_1 vs. WKG_ENB_D_0. It seems that by default (looking at the registers via omapconf) all interrupts are disabled in the *_1 register and that *_0 is used (both on the 5728EVM and our custom hardware).

    Looking forward to your input.
  • 0
    Expert 1290 points

    To follow up:

    • Using the omapconf utility to modify the WKG_ENB_* registers to disable an interrupt did not work - it seems that those registers just configure the wake-up behavior
    • Using the omapconf utility to modify the CTRL_CORE_MPU_IRQ_* registers does work - I can successfully break the GPIO8_IRQ_1 link to the MPU that way, for example

    So, I'd still like to know a more elegant way - ideally through the device tree - to modify the contents of the CTRL_CORE_MPU_IRQ_* registers.

    Thanks