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TMS320C6657: c6657 - Shared Memory Access

Bradley Baker1
Prodigy 140 points
Part Number: TMS320C6657


The c6657 memory map summary (SPRS814C, 6.26), shows:

0x0080,0000  Local L2 SRAM
0x0C00,0000  Multicore shared memory (MSM)
0x1080,0000  CorePac0 L2 SRAM
0x1180,0000  CorePac1 L2 SRAM

The CorePacN L2 SRAM appears to be a shadow of the Local L2 SRAM for each core.  What is the purpose of this? What is the recommended usage with respect to section placement in the linker command file - that is to say, Local L2 SRAM or CorePacN L2 SRAM ?

It appears possible for Core1 to modify locations in CorePac0 L2 and correspondingly Core0's Local L2.  (the same for Core0 wrt CorePac1 L2 and Core1's Local L2).   Is this another instance of shared memory between the cores?  Can these accesses generate an exception or access fault?

  • 0
    TI__Guru**** 161600 points
    Hi,

    I've notified the design team about your query. Feedback will be posted here.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Prodigy 140 points
    After re-reading SPRS814C, I see much of my question addressed in section 7.1.3. However the second sentence leaves me puzzled.

    "0800000, and for C66x CorePac Core 1 (C6657 only) address 0x00800000 is equivalent to 0x11800000. Local addresses should be used only for shared code or data, allowing a single image to be included in memory. "

    Local addresses (0x08xxxxxx) are not shared, but rather are unique to each core. Unless this is referring to a common, though unshared image in each core's local addressing space.
  • 0 in reply to Bradley Baker1
    TI__Genius 12805 points
    Hi Bradley

    So here is the deal. The L2 memory (as well as L1D and L1P) are local to the DSP core but can be accessed by external master. So think about DMA that wants to write to address 0x0080 0000 of core 3, how does it extinguish between the same address in any other core?
    TI solution was to give each internal memory two addresses, local and global. The advantage of having global is clear - accessing from outside. The advantage of having local is that you can load the same code to all DSP cores and each one will have its private L2 (say) memory

    Does it make sense? if so, close the thread

    Ran