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AM5728: PCIe HCSL clock support

Part Number: AM5728

Hi,

Our customer wants to connect a clock for HCSL to ljcb_clk/ljcb_clkn of PCIe of AM5728.
Does the clock input of HCSL support it?
A data sheet of AM5728 did not have the description of electrical characteristic specifications, and PCI Express®Base Specification Revision 3.0 did not have a mention either.
Please tell me what the electrical characteristic should refer to.

Best Regards,
Shigehiro Tsuda

  • Hi,

    The factory team have been notified. They will respond here.
  • Hi again,

    I found it. Section 26.4.4.4.3 from the AM572x TRM Rev. G states:

    "• Receive mode: RX is a clock slicer that receives HCSL or LVDS differential clock (typically from onboard Crystal Oscillator) between ljcb_clkp
    and ljcb_clkn and converts it to CMOS single-ended output CLKREF_ACSPCIE. This CMOS clock signal is the input clock for APLL.
    • Transmission mode: TX is a current switching driver that receives CMOS single-ended clock CLKREF_ADPLL at it's input pin from
    DPLL_PCIE_REF and converts it to HCSL differential-ended output ljcb_clkp and ljcb_clkn. The termination for TX is on-board and 50
    Ohms single-ended or 100 Ohms differential."

    So the answer is yes, HCSL clock is supported on AM572x devices.
  • Hi Biser,

    Thank you for quick reply.
    I understood that HCSL clock is supported on AM572x by your answer.
    Thank you for your kindly and quick support.

    Best Regards,
    Shigehiro Tsuda
  • Hi Biser ,

    Thank you for your quick support.

    I would like the following answers.
    A data sheet of AM5728 did not have the description of electrical characteristic specifications, and PCI Express®Base Specification Revision 3.0 did not have a mention either.
    Please tell me what the electrical characteristic should refer to.

    Best Regards,
    Shigehiro Tsuda