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Linux/AM3359: CAN bus goes into ERROR-PASSIVE state after connecting it to the bus

Part Number: AM3359

Tool/software: Linux

Hello there,

I have been able to setup a CAN bus ( with CAN0 and CAN1) by making one sending and the other receiving without problems.

./ip link set can0 up type can bitrate 125000 listen-only on loopback off restart-ms 100

./ip link set can1 up type can bitrate 125000 listen-only off loopback on restart-ms 100

./cangen can1 -e

./candump can0

with ifconfig i can also see that the received and transmited packets increment.  Bellow you see my output.

root@TQMa335x:~/can-bus ./ip -det -stat link show can0

2: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UNKNOWN qlen 10
    link/can
    can <LISTEN-ONLY> state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 100
    bitrate 125000 sample-point 0.875
    tq 500 prop-seg 6 phase-seg1 7 phase-seg2 2 sjw 1
    c_can: tseg1 2..16 tseg2 1..8 sjw 1..4 brp 1..1024 brp-inc 1
    clock 26000000
    re-started bus-errors arbit-lost error-warn error-pass bus-off
    0          0          0          3          3          0         
    RX: bytes  packets  errors  dropped overrun mcast   
    138353     23929    0       0       0       0      
    TX: bytes  packets  errors  dropped carrier collsns
    104340     18060    0       16      0       0      


root@TQMa335x:~/can-bus ./ip -det -stat link show can1
3: can1: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UP qlen 10
    link/can
    can <LOOPBACK> state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 100
    bitrate 125000 sample-point 0.875
    tq 500 prop-seg 6 phase-seg1 7 phase-seg2 2 sjw 1
    c_can: tseg1 2..16 tseg2 1..8 sjw 1..4 brp 1..1024 brp-inc 1
    clock 26000000
    re-started bus-errors arbit-lost error-warn error-pass bus-off
    0          0          0          1          2          1         
    RX: bytes  packets  errors  dropped overrun mcast   
    555424     75849    1       0       1       0      
    TX: bytes  packets  errors  dropped carrier collsns
    35943      6196     0       32      0       0

->Now the problem comes up when I connect my CAN0 to a separate bus (Extended CAN). I only want to monitor the traffic on the bus.

After i connect it the ERROR-ACTIVE changes to ERROR-PASSIVE and I am not able to see anything from the bus. ifconfig doenst shows any sign of communication going on neither.

root@TQMa335x:~/can-bus ./ip -det -stat link show can0
2: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UNKNOWN qlen 10
    link/can
    can <LISTEN-ONLY> state ERROR-PASSIVE (berr-counter tx 0 rx 127) restart-ms 100
    bitrate 125000 sample-point 0.875
    tq 500 prop-seg 6 phase-seg1 7 phase-seg2 2 sjw 1
    c_can: tseg1 2..16 tseg2 1..8 sjw 1..4 brp 1..1024 brp-inc 1
    clock 26000000
    re-started bus-errors arbit-lost error-warn error-pass bus-off
    0          0          0          4          4          0         
    RX: bytes  packets  errors  dropped overrun mcast   
    148920     25756    0       0       0       0      
    TX: bytes  packets  errors  dropped carrier collsns
    104340     18060    0       16      0       0      

The only reason that can happen is that my separate bus is transmitting errors that my CAN0 node detects and increments in the counter.

But why am I not able to see the errors or the frames being transmitted ?

Or how can I setup to ignore the errors and sniff on the bus?

Much appreciated for any help.

Greetings,

Pedro

  • Hi Pedro,

    Apologies for the delayed response.

    I've notified the can designers. Their feedback should be posted here.

    Best Regards,
    Yordan
  • Hi Yordan,

    I just figured out the problem. After many error and tries (by measuring in the scope the bit-width till 8us)  I have set the bitrate to 133 kbps. Which lead me to check the clock source. I had my clock source set to 26 MHz with a 24 MHz digital oscillator assembled. :-(

    Again after many hours researching how to change the clock source I found out that SYSBOOT[15;14] should be set to 10b.

    This bits in my development board where found in dip switch S1.

    [    0.000000] OMAP clockevent source: timer2 at 24000000 Hz                                      
    [    0.000000] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms               
    [    0.000000] OMAP clocksource: timer1 at 24000000 Hz                                   

    In the end the solution seamed obvious but only after doing some digging I could manage to set it up. ;-)

    PS: the can bus entered immediately in ERROR PASSIVE because the bitrate was wrong causing it to read 6 recessive bits immediately after plugging it in the bus

    Once again many thanks for your prompt help and support.

    Regards,

    Pedro

  • Thanks for sharing your solution with the community.

    Best Regards,
    Yordan