Compiler: enabling cache on DSP

Poonam Metkar

Intellectual 270 points

Tool/software: TI C/C++ Compiler

Hello evryone,

I am using TDA 3X version 2.11.

I want to access cache for most frequently Data.

How to enable cache on DSP.

Please guide me and provide the solution for same.

Best Regards,

Poonam

over 9 years ago

0 Mariya Petkova over 9 years ago

TI__Expert 4885 points

Hi, Poonam,

Experts have been notified and will reply here.

Regards,
Mariya

0 Piyali Goswami over 9 years ago in reply to Mariya Petkova

TI__Mastermind 30245 points

Hi Poonam,

You can refer to the implementation of vision_sdk\src\main_app\tda3xx\cfg\DSP_common.cfg.
The BIOS call of Cache_setSize will set the desired cache size for the L1P, L1D and L2 DSP cache.

Additionally you would need to set the MAR registers to make a region cacheable. Both these configurations are in the above mentioned cfg file.

Additionally from code at run time you can set the cache using Utils_dspCacheInit from file vision_sdk\src\utils_common\src\utils_cache_c66x.c

Hope this helps.

Regards,
Piyali

Processors

Processors forum

Compiler: enabling cache on DSP