Linux/AM5728: McASP dts configure

Ilya Kravchuk

Part Number: AM5728
Other Parts Discussed in Thread: PCM5102, PCM1862

Tool/software: Linux

I've got a customboard, based on sitara am5728, with PCM1862DBT and PCM5102 connected to McASP5 and McASP6 respectively.
PCM1862 recieve master clock from xref_clk0 ball and PCM5102 recieve master clock from xref_clk1 ball.
In the datasheet notes that xref_clk0 can provide mcasp5_ahclkx signal to output and xref_clk1 also can do this for mcasp6_ahclkx.
How I can configure xref_clk0 and xref_clk1 for this purpose via DTS file?

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

You should add them in mcasp5_ahclkx_mux and mcasp6_ahclkx_mux in dra7xx-clocks.dtsi. You should also add the corresponding xref_clkx nodes. Adopt the approach for the other clocks.

Best Regards,
Yordan

0 Ilya Kravchuk over 8 years ago in reply to Yordan Kovachev

Expert 1520 points

Thanks for fast reply.
ref_clk nodes already exist in the draxx-clocks.dtsi file. But it's intended for multiplexing in the internal PCM domain, not physical multiplexing.
As example, I can redirect signal from sys_clk2 to mcasp5_ahclkx_mux or to mcasp6_ahclkx_mux, but I can't send this signal from ahclkx_mux to xref physical pin, using mcasp_ahclkr_mux node.
As I understand, I should to use pinctrl mechanism in this case, and then I can to assign mcasp5_ahclkx to xref_clk0 physical ball, like it implies on picture below.
Am I right? If it's true, how I can assign this via dts file?

0 Yordan Kovachev over 8 years ago in reply to Ilya Kravchuk

TI__Guru**** 161600 points

Hi Ilya,

Sorry, I misunderstood your question. If you wish to pinmux the xref_clk0 as mcasp5_ahclkx, then you need to have something like:

mcasp5_pins: mcasp5_pins {
pinctrl-single,pins = <
0x294 (PIN_INPUT | MUX_MODE4) // this sets CTRL_CORE_PAD_XREF_CLK0[3:0]XREF_CLK0_MUXMODE = 4 => xref_clk0.mcasp5_ahclkx
/*other mcasp5 pins go here*/
>;
};

Then later in the &mcasp5 node, you should use:

&mcasp5 {
pinctrl-names = "default";
pinctrl-0 = <&mcasp5_pins>;
status = "okay";
/*other mcasp5 settings go here*/
};

This way the xref_clk0 ball is configured as mcasp5_ahclkx.

Best Regards,
Yordan

0 Ilya Kravchuk over 8 years ago in reply to Yordan Kovachev

Expert 1520 points

Thanks a lot, it's exactly, what I've meaned

0 Ilya Kravchuk over 8 years ago in reply to Ilya Kravchuk

Expert 1520 points

But I don't understand, how addresses in register map translates with pinctrl-single,function-mask=0x3fffffff.
Why reg 0x177c=0x37c and reg 0x1754=0x3754 with this mask?

0 Yordan Kovachev over 8 years ago in reply to Ilya Kravchuk

TI__Guru**** 161600 points

Hi,

You need to inspect the dtsi files. First you see that the pinctrl settings are added in dra7_pmx_core, which in dra7.dtsi is defined as:
dra7_pmx_core: pinmux@1400 {

and its address space is: reg = <0x1400 0x0468>;

The dra7_pmx_core itself is part of the system control module (subnode of scm), which is defined as:
scm: scm@2000

Which is part of the L4_CFG address space: l4_cfg: l4@4a000000, so the address space of the pmx_core is:
0x1400+0x2000+0x4A000000 = 0x4A003400
to
0x1868+0x2000+0x4A000000 = 0x4A003868

If you check Table 18-28. CTRL_MODULE_CORE Registers Mapping Summary in device TRM you'll see that this corresponds to the physical address of registers CTRL_CORE_PAD_GPMC_AD0 through CTRL_CORE_PAD_RSTOUTN.

If you follow through the pinctrl driver itself, the physical addresses go through virtualization so that they can be used with __raw_writel() & __raw_readl() functions.

Hope this helps.

Best Regards,
Yordan

0 Ilya Kravchuk over 8 years ago in reply to Yordan Kovachev

Expert 1520 points

Thanks a lot for your help, now it's clearly obvious

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Linux/AM5728: McASP dts configure