This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

EVM6474 CSL EDMA interrupt



Hi all,

I have built a project which uses edma to move data from core0 to core1. BufData is initialized on core0 and edma interrupt is mapped to core1's vect4, then core0 setup edma and trigger channel. I want edma to notify core1 after it finishes moving the data, but the result shows that the edmaIntDispatcher function is not even involved. So my question is: Is it possible for edma module to be initialized by one core and the TPCC Completion Interrupt be dealt by another core?

(Core0 can receive a TPCC Completion Interrupt when the interrupt is mapped to core0's vect4 instead of core1's)

Best regards,

Liang

  • In TI's "Multicore Programming Guide" 3.2.2

    It says that signaling between cores can also be performed through 3rd-party transport,such as EDMA controller. I think I have configured something wrong. Does anyone have such kind of example? 

    Thanks

  • I have solved the problem. I missed an important step: CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,&regionIntr) is also required on core1.

    Sorry for this post. Thank you all. :)

     

    Best regards,

    Liang