TMS320C6678: TSIP Bitmap Context how it works

Hitoshi Sugawara

Mastermind 19960 points

Part Number: TMS320C6678

Hi Folks,

The UG says "The resulting 8-bit sample data for each of the
enabled channels is then OR'd together to create a single 8-bit sample value that is
written to the appropriate transmit data register (DXn). The ability to combine the data
from multiple channels enables the creation and use of physical timeslot sharing
provided that the bit values are zero for the unused bits in the physical timeslot data for
a given channel. "

Could you please describe easily?
I can not figure out the relationship among the procedures DX/DR <-> Channel Buffer <-> DSP internal RAM with Bitmap context.

Thank you very much for your time to explanation.
Best regards,
Hitoshi

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi Hitoshi,

I've notified the design team. Their feedback will be posted here.

Best Regards,
Yordan

0 lding over 8 years ago in reply to Yordan Kovachev

TI__Guru* 95265 points

Hi,

It may be a clearer by reading 2.5 Serial Link Processing and Buffering. It looks to me that you have multiple channels with the same physical timeslots, the sample is OR'ed togther and write into DXn register for transmission.

On the Rx side, the data in the DRn registers are stored in the channel buffer based on the channel bitmap context. Data received on each of the receive serial links can be stored in none, some, or all of the channel buffers. On reaching a watermark in the channel buffer, its DMA engine transfers the data from the channel buffers to the memory buffers outside the system. Each of the buffers is managed as a FIFO memory and consists of 64 32-bit words of memory.

Regards, Eric

0 Hitoshi Sugawara over 8 years ago in reply to lding

TI__Mastermind 19960 points

Hi Eric,

Understand.
Thank you for kind explanation.
Best regards,
Hitoshi

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TMS320C6678: TSIP Bitmap Context how it works