Linux/AM3352: GPMC NAND timing

Hi,

Which Linux version is this? The AM335x TRM Rev. O, section 7.1.3.3 describes NAND configuration.

Also check section 7.1.2.3.12

Hi,
We are using kernel version 3.2.0 and we want to verify timing parameters in structure am335x_nand_timinigs, which in am335x's board file.

BR
Rohit Khatri

Hi,
I didn't find same timing parameters given in structure anywhere in TRM(Rev. O) section 7.1.3.3.
BR
Rohit Khatri

I have asked the software team to look at this. They will respond here. Please note that kernel 3.2 is very old, it's not maintained any more, and it's not supported for new designs.

Hi,

Chip-select signal timings (in nanoseconds) corresponding to GPMC_CONFIG2:
.cs_rd_off --> Read deassertion time, ns
.cs_wr_off --> Write deassertion time, ns
ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3:
.adv_on --> Assertion time
.adv_rd_off --> Read deassertion time
.adv_wr_off --> Write deassertion time
WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:
.we_off --> Deassertion time
OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:
.oe_off --> Deassertion time
Access time and cycle time timings (in nanoseconds) corresponding to GPMC_CONFIG5:
.access --> Start-cycle to first data valid delay
.rd_cycle --> Total read cycle time
.wr_cycle --> Total write cycle time

The following are only applicable to OMAP3+ and AM335x:
.wr_access --> In synchronous write mode, for single or burst accesses, defines the number of GPMC_FCLK cycles from start access time
to the GPMC_CLK rising edge used by thememory device for the first data capture.
.wr_data_mux_bus --> In address-data multiplex mode, specifies the time when the first data is driven on the address-data bus.

Best Regards,
Yordan

I assume your 512 MB Flash has the same timing as the 256 MB Flash.

NAND-Flashes are very uniform in their interface.

Hi,

Thanks for your detailed explanation. I got above points in TRM.

But I can't map all this parameters to actual NAND flash data sheet, means parameters which I have to fill in structure or in registers as per TRM are not linked directly with flash timings(Above parameters are not given in flash's datasheet).

So, how to derive above parameters in terms of timings?

Regards

Rohit Khatri

I have compared both data sheets, bot are pin to pin have compliance but approx 15 timings are not matching. Both are from same manufacturer(Micron) also.