AM5728: Pad configuration register WAKEUPENABLE bit

matusan

Part Number: AM5728

Hello, TI Experts,

Our customer sent us a question about "Pad Configuration Registers" of AM5728.

Question is about the behavior of "WAKEUPENABLE-bit" as below from TRM(SPRUHZ6H)"18.4.6.1.1 Pad Configuration Registers".

- I/O wake-up function is enabled by setting "WAKEUPENABLE-bit".

- After that, does interruption occur when wake-up event is detected on the PAD?

They want to know "WAKEUPENABLE-bit" is related to interrupt generating function or not.

Best regards

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

To understand the WAKEUPENABLE bit you must also see the WAKEUPEVENT bit:

"Wake-up event status for a given pad. Indicates whenever the pad state is changed (0->1 or 1->0). In addition, when a wake-up event from a given I/O cell is received, the PRCM will wake up the MPU by switching-on its power domain and clocks and then generating an interrupt."

0 matusan over 8 years ago in reply to Biser Gatchev-XID

Guru 10235 points

Hi,

Thank you for your prompt reply.
This information is very helpful!

Best regards

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AM5728: Pad configuration register WAKEUPENABLE bit