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AM5728: PCIe clock to FPGA

Neelam singh
Expert 1035 points
Part Number: AM5728

Hi,

In our customize design we are suing PCIE of AM5728 to communicate with FPGA

AM5728 -------> FPGA

AM5728 is as root complex and FPGA as a End point. My question is in this case DSP will generate PCIe clock to give FPGA if we set it as Root Complex 

We have connected PCIE Clock to the FPGA Clocks . Will it work ? Can DSP generate PCIe clock internally or we have to supply Clock from External Source.

Regards

Neelam

  • 0
    TI__Guru**** 393215 points
    The PCIe experts have been notified. They will respond here.
  • 0
    TI__Mastermind 27890 points

    Yes, The AM572x series of devices are capable of supplying the PCIe REFCLK. This is accomplished via DPLL_PCIe_REF, which is controlled by the PRCM and is derived from SYS_CLK1. Please refer to Figure 26-15 in the TRM for an overview of PCIe clocking and Figure 26-19 for a more in-depth discussion of same. Also, section 26.4.5 of the TRM provides a low-level subsystem programming guide that you may find useful in trying to better understand the clocking topology and APLL/DPLL relationships. Steps 12 and 13 are particularly pertinent to your question.

  • 0 in reply to -DK-
    Expert 1035 points

    Hi,

    Thanks !

    It is also possible to generate by using bare metal coding(non os based coding).

    We are using Linux OS.Therefore, we have to modify the Linux kernel level driver to generate this PCIe Ref Clock. Can you please help on this. Can you provide some documentation on this.

    Regards

    Neelam