Linux/AM5728: Setting PCIe output clock from device tree

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I have the common goal with Heather to get the PCIe clock of 100 MHz output from the AM5728 to an external M.2 PCIe slot. Some similar posts on this forum to accomplish the same goal are as follows:

Linux/AM5728: PCIe clock output from ljcb_clk pins
e2e.ti.com/.../1959949
AM5728: PCIe clock to FPGA
e2e.ti.com/.../575627
how to make AM572x PCIe PHY refer clock out ?
e2e.ti.com/.../1959949

It does not appear to be so simple to configure this output PCIe clock from either the device tree or in Linux as there is particular sequencing that needs to be satisfied and there are multiple clocks and multiple registers that I suspect need to be configured. Using a M.2 PCIe breakout board from which I can measure the clock output from the AM5728. I'm looking for a solution to this issue with the most simple method to configure an external 100 MHz clock output to the M.2 PCIe connector on our board. This is primarily an internal either device tree or linux source code modification required to achieve this goal. Our project is in need to get this working to determine whether or not there needs to be a hardware modification for our next turn of our custom board using the AM5728 processor. This is specific to the AM5728 and does not have much to do with the custom board. Can we get some support on this to get this 100 MHz clock output for our M.2 PCIe slot?

Hi, Anthony,

We have not tried with the clock output. TI AM5728 EVM can't support it without hardware modification.

Rex

productioin -> production (spelling correction)

Do you have the capability to modify your AM5728 EVM board to disable the onboard 100 MHz oscillator and support me in working on getting this internal AM5728 100 MHz clock output externally? I'm willing to modify my EVM board. Please advise.

Anthony,

TI had this clock output verified, but not using Linux though. I believe it used either bare metal or RTOS CCS project to configure the ACSPCIE reference clock buffer and set the Tx_Rx_Control field of the CTRL_CORE_SMA_SW_6 register to Tx mode. I am trying to get details on how it was tested, and see if I can get an EVM which has the population options to support both modes.

Rex

Sounds good. I'll be needing both configurations with an external 100 MHz oscillator and the Internally generated 100 MHz clock from the AM5728 in order to identify all that needs to be changed. U-Boot is not really an option for the configuration. It will have to be either Linux kernel source code or the device tree OR both if that works. Whatever works is what I'm looking for. Thanks.

Hi, Anthony,

I suggest that we verify the hardware first, if you don't mind, using the TI RTOS Proc SDK. It contains the PCIe example under PDK. You can use the CCS to run the PCIe example project, and be sure the CTRL_CORE_SMA_SW_6 is set to Tx mdoe. Then, see if you can measure any frequencies at ljcb_clkp and ljcb_clkn.

The RTOS can be downloaded from software-dl.ti.com/.../index_FDS.html.

Rex

Is this going to require a JTAG debugger to download/program/run the TI RTOS CCS application? This hardware has been verified and is currently running Linux, board bring up has been completed with the exception of this PCIe clock output from the AM5728.

I'm not understanding about verifying the hardware first on this post. The ljcb_clkp, and the ljcb_clkn signals are directly connected to the M.2 PCIe connector. In this case we would be verifying the AM5728 hardware. Please explain what you mean by verifying the hardware first.

Hi Anthony and Team,

What I'm hearing back is that instructions on programming the REFCLK direction are listed in TRM Table 26-61. PCIePHY Subsystem Low-Level Programming Sequence. Has this sequence been implemented already?

Regards,
Ryan