This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Issue to configure EDMA over L138 (ARM)

Hi,

I wrote SDIO driver over MMC 1 for L138 and it is working fine with CPU transfer mode. Currently in the process of supporting EDMA. There are dedicated channel for MMC 1 as DMA_RX:16 and DMA_TX:17.

 The code snippet given bellow is the way that i am following to configure and transfer using EDMA which is not working

It will be of great help if you let me know the procedure to configure and transfer using EDMA to MMC-1.

Thanks in advance

==============================

sdio_Transfer(void         *pData, unsigned int uLen)

{

        g_drv.edma_tx_channel = 16;

        /* Acquire master EDMA WRITE channel */
        edma_alloc_channel(g_drv.edma_tx_channel, sdiodrv_dma_cb, &g_drv,  EVENTQ_DEFAULT);
        sync_dev = g_drv.edma_tx_channel;
         src_bidx = acnt;
         src_cidx = acnt * bcnt;
         ccnt = 0;
         dst_port = (u32)g_drv.regBase + OMAP_HSMMC_MMCDXR;
         dst_bidx = 0;
         dst_cidx = 0;

        edma_set_src(sync_dev, src_port, INCR, 0);
        edma_set_dest(sync_dev, dst_port, INCR, 0);
        edma_set_src_index(sync_dev, src_bidx, src_cidx);
        //edma_set_src_index(sync_dev, 0, 0);
        edma_set_dest_index(sync_dev, dst_bidx, dst_cidx);

        edma_set_transfer_params(sync_dev, acnt, bcnt, ccnt, 8, ABSYNC);
        edma_read_slot(sync_dev, &param_template);
        template->opt |= EDMA_CHAN_SLOT(sync_dev) << 12;


    dma_bus_address = dma_map_single(g_drv.dev,
                                        pData, //data recevive from application
                                        uLen,
                                        DMA_TO_DEVICE);
    template->src = dma_bus_address;
    template->ccnt = ccnt;
    edma_write_slot(g_drv.slot, &param_template);
    edma_start(g_drv.edma_tx_channel);
}

============================================ 

 

I need information about the acnt, bcnt & ccnt.

My TX and RX registers are 4 byte in size and FIFO size is 64 byte. So i set acnt to 4, bcnt to 16 (because FIFO size is 64 byte (64/4 = 16) ) and ccnt is uLen/64 (uLen is the packet size received from application).

Please let me know i am missing anything in EDMA configuration.

 

 

Regards

Sanjay