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Request Help with PADK Application

First let me preface my remarks by saying that I am fairly new to the C6727 and PADK board.

What we want to do is to grab an A/D sample at a 1kHz rate, operate on that sample and then output to three D/A's.

We are using CCS v4 and have imported several of Lyrtech's v3.3 projects in.  Our thought was to hack one of those in order to get what we want.  Time is somewhat of the essence, but the learning curve is steep with dMAX and McASP and interrupts in general on the TI processor.

The problem we have hacking the Lyrtech projects is the latency from A/D input to D/A output is much too long for our application.  Even the loopback examples have too much latency.  But we're stuck with the board, so we have to make this work.

What I'd ideally like is someone with knowledge to tell me how to hack one of the Lyrtech projects.  Or be able to tell me more about how to interrupt the processor such that we get what we went.  Can anybody help me?  I'll respond to comments / suggestions.

Thanks.

  • Hollis,

    Have you tried to contact Lyrtech about the latency?  I am looking for someone familiar with PADK to help you out, but the theme seems to be that Lyrtech would be most familiar with the PADK hardware/software.

    -Tommy

  • Hollis Ambrose said:
    Even the loopback examples have too much latency.

    How much latency do you require? How much latency have you measured that is too much?

    I am not extremely familiar with the PADK, but I have seen one and know that it has a lot of audio channels available. Which are you using for the A/D and the D/As?

    Do you have the 1kHz rate working? That is pretty slow for any DSP, so you should be able to just use polling on whatever port you use for accessing the A/D and have plenty of time to do you work and then output the sample to the three D/A's.

  • Yes, I've contacted Lyrtech about it.  It turns out that the audio A/D's and D/A's have group delay on the order of the latency we are observing, so, we are okay.  It would have been nice for our controls-type application to have less latency, but it may be that the system that we are simulating in the DSP has the dominant latency.

  • It turns out that the group delay of the A/D's and D/A's that Lyrtech uses on their boards is smaller at a higher sampling rate.  So we're going to run the devices at 96 kHz and calculate a new value every 96 samples to effectively get a 1 kHz rate.