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Changing the DVEVM memory map

I've followed the "Changing_the_DVEVM_memory_map" on davincidsp wiki (http://wiki.davincidsp.com/index.php/Changing_the_DVEVM_memory_map), but it's quiet a big piece of document. I've tried several times by studying back and forth in the document, but still without success.

I'm trying to shrink the stock 256mb memory map configuration down to 128mb for our custom board, and get gst-ti-dmai up and running. I'm ONLY trying to get "audio decode" working, because audio should always be an easier thing (i guess?)... All experiments below are done on a EVM. Well I might be stupid on this memory map things, but I do know that if it doesn't work on EVM, it wouldn't work on my board anyway...... T___T

I'm with a dm6446 evm board and these software components:

  • dvsdk_2_00_00_22
  • codec_engine_2_24_01
  • dsplink_linux_1_63
  • linuxutils_2_25
  • framework_components_2_24_01
  • dm6446_dvsdk_combos_2_05
  • dmai (svn branch BRANCH_BRIJESH_DMAI_DEV_2_xx)
  • kernel (linux-davinci.git 2.6.32-rc2-davinci1 from arago git)
  • u-boot bootargs: "mem=64M console=ttyS0,115200n8 root=/dev/nfs nfsroot=192.168.1.107:/home/sysroot/armv5tel-softfloat-linux-gnueabi,nolock ip=dhcp"

My idea is simple:

  • 0x80000000 - Linux (64mb)
  • 0x84000000 - CMEM (10mb)
  • 0x84a00000 - DDRALGHEAP (48MB)
  • 0x87a00000 - DDR2 (4MB)
  • 0x87e00000 - DSPLINKMEM (1MB)
  • 0x87f00000 - RESET_VECTOR (128B)
  • 0x88000000 - Unused as our custom board don't have these memory (128MB)

I've modified these files:

  • dsplink_linux_1_63/packages/dsplink/config/all/CFG_DM6446GEM_SHMEM.c
    • RESETCTRLADDR => 0x87F00000
    • CODEMEMORYADDR => 0x87A00000
    • CODEMEMORYSIZE => 0x00400000
    • SHAREDMEMORYADDR0 => 0x87E00000
    • others remained unchanged.
  • dsplink_linux_1_63/packages/dsplink/config/BUILD/CFG_DM6446GEM_SHMEM.c (I rm-ed this file, and it gets copied over from the above file)
  • dsplink_linux_1_63/packages/dsplink/dsp/inc/DspBios/5.XX/DM6446GEM/dsplink-dm6446gem-base.tci
    • RESET_VECTOR.base => 0x87F00000
    • DDR2.base => 0x87A00000
    • DDR2.len => 0x00400000
    • DSPLINKMEM.base => DDR2.base + DDR2.len (which should be 0x87E00000)
    • DSPLINKMEM.len => 0x00030000
    • POOLMEM.base => DSPLINKMEM.base + DSPLINKMEM.len
    • POOLMEM.len => 0x000d0000
  • dm6446_dvsdk_combos_2_05/packages/ti/sdo/servers/decode/decode.tcf
    • DDRALGHEAP
      • base => 0x84a00000 (74MB)
      • len => 0x03000000 (48MB)
    • DDR2
      • base => 0x87a00000 (122MB)
      • len => 0x00400000 (4MB)
    • DSPLINKMEM
      • base => 0x87e00000 (126MB)
      • len => 0x00100000 (1MB)
    • RESET_VECTOR
      • base => 0x87f00000 (127MB)
  • loadmodule.sh for gstreamer
    • insmod cmemk.ko phys_start=0x84000000 phys_end=0x84a00000 pools=1x5250000,2x829440,3x1036800,1x8192,1x1

and then recompile with `make dsplink_clean dmai_clean codecs_clean && make dsplink && make codecs && make dmai && make install`, and rebuild + reinstall gst-ti-dmai.

then try loadmodule.sh and `CE_DEBUG=3 gst-launch-0.10 filesrc location=/opt/data/sounds/davincieffect.aac ! TIAuddec1 codecName=aachedec engineName=decode ! alsasink sync=false` complains about memory-map mismatch.

I used `diff -a` to compare two dsplinkk.ko, but the only difference is compile datetime... so they're basically identicle, so afaik dsplinkk.ko is not affected by memory-map modification. according to the "CE Config Update" from wiki (http://wiki.msp430.com/index.php/CE_Config_Updates), all memory-map settings are now done in codec servers (Engine.createFromServer()).

however, no matter how i modify decode.tcf, CE_DEBUG always tell me

  • @0,704,070us: [+2 T:0x40f99470 S:0x40f98d24] OP - Processor_create_d> Adding DSP segment #0 to Link configuration: name='DDR2', startAddress=0x8fa00000, sizeInBytes=0x400000, shared=1, syncd=0
  • @0,704,283us: [+2 T:0x40f99470 S:0x40f98d24] OP - Processor_create_d> Adding DSP segment #1 to Link configuration: name='DSPLINKMEM', startAddress=0x8fe00000, sizeInBytes=0x100000, shared=1, syncd=0
  • @0,706,770us: [+2 T:0x40f99470 S:0x40f98d24] OP - Processor_create_d> Adding DSP segment #2 to Link configuration: name='RESET_VECTOR', startAddress=0x8ff00000, sizeInBytes=0x80, shared=1, syncd=0
  • @0,707,205us: [+2 T:0x40f99470 S:0x40f98d24] OP - Processor_create_d> Adding DSP segment #3 to Link configuration: name='DDRALGHEAP', startAddress=0x88000000, sizeInBytes=0x7a00000, shared=0, syncd=0

and the memory settings in linkCfg->dspConfigs[0]->memTables[0][i] NEVER ARE the value I configured in decode.tcf, either.

What am I missing? how do I do this in a CE2.0 approach? Is there a newer "Changing the DVEVM memory map" that targets a more recent version of dvsdk / codec engine / codec combos / dsplink somewhere?

============

btw, is there a way to modify codec engine ti.sdo.ce.osal.Global so i can change DEFAULT_ARMDSPLINKCONFIG to my memory map anyway? if I `make -f package.mak clean` under codec_engine_2_24_01/packages/ti/sdo/ce/osal/, is there a way of regenerating "package/ti.sdo.ce.osal.sch" again?

  • I didn't build gst demos before, but from the building process of the decode demo, after building of codec and dmai, you need to rebuild the gst demo. Usually during the building procee, the demo will read the info of the DSP server, which list the package info just as you give.

  • This artical gives the way to change the armDspLinkConfig, although it doesn't tell how to change the default value. Hope it helps.

    http://wiki.davincidsp.com/index.php/Changing_the_DVEVM_memory_map#Rebuilding_the_Arm-side_application_-_if_you_use_DSP_Link_1.40_.28or_above.29

  • You don't need to edit DEFAULT_ARMDSPLINKCONFIG to change the memory map.  The memory map is passed to dsplink by the application.  The key thing to change (which you did) is the memory map in decode.tcf.  After you've built your server you need to rebuild your ARM-side application.  Did you do that?   Can you verify that createFromServer is looking in the right place (sorry, I forget if it prints out the path of the server it finds)?  Perhaps something is not configured right and even though you're rebuilding a server in one place, perhaps it's actually pointing to a different server for the createFromServer step and that's why it never changes.

  • well, i've rebuilded everything after modifying the files mentioned above

    • under dvsdk_2_00_00_22/
      • make dsplink_clean codecs_clean dmai_clean
      • make dsplink_arm dsplink_dsp
      • make codecs
      • make dmai
      • make install
    • under gst-ti-plugin-minimal-1.01.00/
      • make clean
      • rm -rf src/gstticodecplugin_dm6446
      • make -f Makefile.external dm6446
      • copy the generated libgstticodecplugin.so to target rootfs

    and on evm, loadmodules.sh first, then gst-launch-0.10 to decode the davincieffect.aac.

    I'm sure `make install` puts the files to correct place, because i rm those files before `make install`, same thing does to libgstticodecplugin.so, i made sure gst-inspect doesn't find TIAudenc1 with the file deleted. as for the decodeCombo.x64P, I cd-ed to another directory and try to run gst-launch with CE_DEBUG=3, it would complain about missing decodeCombo.x64P instead of complain about memory map mismatched.

  • May I ask where to download C6000CGT 7.x beta? It's not on "https://www-a.ti.com/downloads/sds_support/TICodegenerationTools/download.htm".

    and I've successfully changed the memory map by modifying everything related about DEFAULT_ARMDSPLINKCONFIG in these files under `codec_engine_2_24_01` folder: (well its pretty much a manual find + sed)

    • packages/ti/sdo/ce/osal/Global.xdc:
      • line 96 ~ 99:
        • from:
          ["DDRALGHEAP", {addr: 0x88000000, size: 0x07A00000, type: "other"}],
          ["DDR2", {addr: 0x8FA00000, size: 0x00400000, type: "main" }],
          ["DSPLINKMEM", {addr: 0x8FE00000, size: 0x00100000, type: "link" }],
          ["RESETCTRL", {addr: 0x8FF00000, size: 0x00000080, type: "reset"}],
        • to:
          ["DDRALGHEAP", {addr: 0x84a00000, size: 0x03000000, type: "other"}],
          ["DDR2", {addr: 0x87a00000, size: 0x00400000, type: "main" }],
          ["DSPLINKMEM", {addr: 0x87e00000, size: 0x00100000, type: "link" }],
          ["RESETCTRL", {addr: 0x87f00000, size: 0x00000080, type: "reset"}], 
    • packages/ti/sdo/ce/osal/package/ti.sdo.ce.osal.sch:
      • line 39:
        • from:
          $om.$$bind('ti.sdo.ce.osal.Global.DEFAULT_ARMDSPLINKCONFIG', $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x88000000, size: 0x07A00000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x8FA00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x8FE00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x8FF00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}));
        • to:
          $om.$$bind('ti.sdo.ce.osal.Global.DEFAULT_ARMDSPLINKCONFIG', $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x84a00000, size: 0x03000000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x87a00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x87e00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x87f00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}));
      • line 67:
        • from:
          po.$$fld('DEFAULT_ARMDSPLINKCONFIG', $om['ti.sdo.ce.ipc.IIpc.ArmDspLinkConfig'], $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x88000000, size: 0x07A00000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x8FA00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x8FE00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x8FF00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}), 'rh');
        • to:
          po.$$fld('DEFAULT_ARMDSPLINKCONFIG', $om['ti.sdo.ce.ipc.IIpc.ArmDspLinkConfig'], $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x84a00000, size: 0x03000000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x87a00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x87e00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x87f00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}), 'rh');
    • packages/ti/sdo/ce/ipc/Settings.xdc:
      • line 105 ~ 109:
        • from:
          ["DDRALGHEAP", {addr: 0x88000000, size: 0x07A00000, type: "other"}],
          ["DDR2", {addr: 0x8FA00000, size: 0x00400000, type: "main" }],
          ["DSPLINKMEM", {addr: 0x8FE00000, size: 0x00100000, type: "link" }],
          ["RESETCTRL", {addr: 0x8FF00000, size: 0x00000080, type: "reset"}],
        • to:
          ["DDRALGHEAP", {addr: 0x84a00000, size: 0x03000000, type: "other"}],
          ["DDR2", {addr: 0x87a00000, size: 0x00400000, type: "main" }],
          ["DSPLINKMEM", {addr: 0x87e00000, size: 0x00100000, type: "link" }],
          ["RESETCTRL", {addr: 0x87f00000, size: 0x00000080, type: "reset"}],
    • packages/ti/sdo/ce/ipc/package/ti.sdo.ce.ipc.sch:
      • line 41:
        • from:
          $om.$$bind('ti.sdo.ce.ipc.Settings.DEFAULT_ARMDSPLINKCONFIG', $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x88000000, size: 0x07A00000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x8FA00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x8FE00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x8FF00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}));
        • to:
          $om.$$bind('ti.sdo.ce.ipc.Settings.DEFAULT_ARMDSPLINKCONFIG', $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x84a00000, size: 0x03000000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x87a00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x87e00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x87f00000, size: 0x00000080, type: "reset"})])]), doPowerControl: false}));
      • line 65:
        • from:
          po.$$fld('DEFAULT_ARMDSPLINKCONFIG', $om['ti.sdo.ce.ipc.IIpc.ArmDspLinkConfig'], $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x88000000, size: 0x07A00000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x8FA00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x8FE00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x8FF00000, size:0x00000080, type: "reset"})])]), doPowerControl: false}), 'rh');
        • to:
          po.$$fld('DEFAULT_ARMDSPLINKCONFIG', $om['ti.sdo.ce.ipc.IIpc.ArmDspLinkConfig'], $$SO({memTable: $$SO([$$SO(["DDRALGHEAP", $$SO({addr: 0x84a00000, size: 0x03000000, type: "other"})]), $$SO(["DDR2", $$SO({addr: 0x87a00000, size: 0x00400000, type: "main"})]), $$SO(["DSPLINKMEM", $$SO({addr: 0x87e00000, size: 0x00100000, type: "link"})]), $$SO(["RESETCTRL", $$SO({addr: 0x87f00000, size:0x00000080, type: "reset"})])]), doPowerControl: false}), 'rh');
    • packages/ti/sdo/ce/ipc/dsplink/DspLinkCfg.xdc:
      • Line 50 ~ 180:
        • there're too many and i'm lazy to paste them here...
    • packages/ti/sdo/ce/ipc/dsplink/package/ti.sdo.ce.ipc.dsplink.sch
      • Line 81:
        • this line is very long, and i'm lazy to paste them here, too......

    and then i just recompile dsplink/codec combos/dmai/gst-ti-plugins by doing:

    • under DVSDK_INSTALL_PATH:
      • make dsplink_clean codecs_clean dmai_clean
      • make dsplink && make codecs && make dmai
      • make install
    • under gst-ti-plugins-minimal-1.0.1:
      • make clean
      • make -f Makefile.external dm6446
      • find . -type f -name \*.so -exec ${CROSS_COMPILE}strip \{\} \;
      • find . -type f -name \*.so -exec cp \{\} ${TARGET_ROOTFS}/${GST_PLUGINS_PATH} \;

    emm... why is the same DEFAULT_ARMDSPLINKCONFIG being defined in 3 different places 3 times? should we just define them once inside ti.sdo.ce.ipc.dsplink and let others consult that?

    and, is there a way for generating the .sch file after modifying .xdc files? modifying them by hand manually is a rather silly thing to do.

  • I know you're desperately trying to make it work (and it looks like you've had some success!), but this is not the right way to change the memory map.  I'm afraid you're creating a maintenance nightmare for yourself.

    Can you please check in your app.cfg file and see if there are any references to DEFAULT_ARMDSPLINKCONFIG or osalGlobal.armDspLinkConfig (or something similar)?  Can you post your app.cfg file?

  • well, i'm trying to build the gst-ti-plugins-minimal-1.01.00 for my dm6446 board.

    i never touched any *.cfg, just modified Makefile.external to point to my headers/libraries/toolchains. and `find . -type f -name \*.cfg | xargs grep -i armdsplinkconfig` doesn't show anything either.