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AM4377: Power-down sequence

Meir Battan
Expert 4050 points
Part Number: AM4377


Hello,

One of my customers is using the AM4377BZDND80. All their voltages (VDDS, VDDS_CLKOUT VDDSHVx, etc.) are 1.8V. the power up sequence is acording to the below plot:

 

The requirements of the power down sequence are mentioned in the datasheet, but they are not clear to my customer.

 

1. The only specification here is about the below voltages: VDDS, VDDS_CLKOUT VDDSHVx – but since they are 1.8V, the customer believe that with them it won’t be a problem.

2. For the 1.2V and 1.1V - it is written that “The preferred way to sequence power down is to have all the power supplies ramped down sequentially in the exact reverse order of the power-up sequencing” – Is it mandatory to have the sequence on this order? What are the other options?

3. Additional input that they would like to get clarification is “All other external clocks to the device should be shut off” – can you explain?

4. This is their voltages plot: is the power sequencing here right? Is there a risk to damage the processor in this way?

Regards,

Meir.

  • 0
    TI__Guru**** 393215 points
    Hi,

    You say that all voltages are 1.8V, yet on the plot there is a 3.3V rail. Which is correct?
  • 0 in reply to Biser Gatchev-XID
    Prodigy 50 points
    Hi

    The 3.3V rail is the rail of the USB voltage (VDDA3P3V_USB0) and he must be 3.3V ,all other voltage (VDDSHVx [x=1-11] ) are 1.8V.

    Best Regards
    Moshe Bar
  • 0 in reply to Biser Gatchev-XID
    TI__Expert 4050 points

    Hi Biser,

    Thanks for the constant support - we don't take it for granted.

    The 3.3V is the USB voltage rail (VDDA3P3V_USB0) - it must be 3.3V, all other voltage rails are 1.8V (VDDSHVx [x=1-11] ).

    can you please support us on the above question? 

    Regards.

    Meir.

  • 0 in reply to moshe bar
    TI__Guru**** 393215 points
    OK, this is clear now. On your questions:

    1. The only specification here is about the below voltages: VDDS, VDDS_CLKOUT VDDSHVx – but since they are 1.8V, the customer believe that with them it won’t be a problem.

    Correct.

    2. For the 1.2V and 1.1V - it is written that “The preferred way to sequence power down is to have all the power supplies ramped down sequentially in the exact reverse order of the power-up sequencing” – Is it mandatory to have the sequence on this order? What are the other options?

    No, this is simply the preferred way. The other way is to ramp down simultaneously.

    3. Additional input that they would like to get clarification is “All other external clocks to the device should be shut off” – can you explain?

    Any other clock signals that are fed to device inputs.

    4. This is their voltages plot: is the power sequencing here right? Is there a risk to damage the processor in this way?

    I don't think any damage will happen.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 50 points

    Hi Biser,

    Thanks for the answers, regarding to question 3

     " Additional input that they would like to get clarification is “All other external clocks to the device should be shut off” – can you explain?

    Any other clock signals that are fed to device inputs."

     

    Is it mandatory to shut off external clocks or it is a recommendation? If we don’t  shut them off   Is there a risk to damage the processor?

     

    Best Regards

    Moshe Bar

  • 0 in reply to moshe bar
    TI__Guru**** 393215 points
    AM437x I/O pins are not fail-safe. No voltage should be present on them while the processor is unpowered. See parameter "Steady State Max. Voltage at all IO pins" in section 5.1 from the AM437x Datasheet Rev. D. Also check Note 5 after the table.
  • 0 in reply to Biser Gatchev-XID
    TI__Expert 4050 points

    Hello,

    Following our correspondence, the customer asked for clear and straightforward answers to two questions regarding power down sequence:

    1. If all voltages (1.8V – VDDSHVx [x=1-11], 1.2V – LPDDR2, 1.1 – VDD_MPU/CORE, 3.3V - VDDA3P3V_USB0) ramp down at the same time , will it permanently damage the hardware?
    2. If the external clock source (CLK_M_OSC – Pin C25) shuts off at the same time with the voltages mentioned above, will it permanently damage the hardware?

    Regards,

    Meir.

  • 0 in reply to Meir Battan
    TI__Guru**** 393215 points
    To both questions:

    Power-down sequencing requirements are specified in section 5.13.1.3 of the AM437x Datasheet Rev. D. If they are not followed TI will assume no responsibility for any damage to the device.