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Optimal design based on DM365 and TVP5158

Yulin
Expert 1625 points
Other Parts Discussed in Thread: TVP5158

Hi there,

I am developing a multi-channel DVR based on DM365 and TVP5158 and look for an optimized design to achieve 30fps.
Capture 4ch CIF (2x2,720x480) and resize to 640x480/320x240 to encode/display.
Resizer 0 is reserved for encode while resizer 1 is reserved for display (upto 800x480x24bpp) for higher resolution demands (8ch CIF).
Both resizers are configured in normal mode and oneshot mode. And both are triggerd by IPIPEIF at the same time.
I found the display is poor in moving edges for interlaced capture and down-sample inside TVP5158 and resizer inside DM365.
Resized to 320x240 is even worse than resized to 640x480 in display quality.

Q1. How to configure the resizer for a more smooth output ?
Q2. Can TVP5158 be patched to output only odd (or even) field instead of down-sampling as a simple de-interlacing?
Q3. Can TVP5158 be patched for horizontally-reversed output for specified channels for mirror applications ?
 It takes extra CPU/EDMA/memory bandwidth to have this done inside DM365.
Q4. Can TVP5158 be patched to output line-interleaved 4 CVBS and 1 BT656 (total 5 different inputs) ?

Thanks in advance.

  • 0
    TI__Genius 9101 points

    hi Yulin,

    Q1. How to configure the resizer for a more smooth output ?

    [TI] Resizer when used in DDR IN one shot can give some problems due to DDR Bandwidth (BW), especially in multi-ch applications. In cases where DDR BW is not enough resizer will abort its output and you may see incomplete frame in the memory. Some ways to get better performance from the resizer.

    Adjust resizer CLKDIV M/N so resizer speed is changed depending on the DDR BW in a given use.Typically we keep M = 10 and vary value of N (min N = 20 when M = 10)

    Value of N when it is low will make resizer run faster but consume more peak DDR bandwidth, thus increasing chances of incomplete resizing
    Value of N when it is high low will make resizer run slower but consume less peak DDR bandwidth, thus decreasing chances of incomplete resizing.

    Even with this you find that 990 out of 1000 times say resizer resize fines but 10 out of 1000 it may still fail, in such scenario you should retry the resizing on the same input.
    Sometimes due to periodic peak DDR BW due to other parts of the system, the resizer may fail sometimes but work of the times. In such cases we just rerun the resize on the same input. You can detect if resize failed by writing a 4byte in the last pixel of line of output and if this pattern is present after resize API, i.e output was not written until last pixel then retry.

    We have used this mechanism in DM365DVR RDK.

    800x480 @ 60fps for display, I believe,  will consume lot of DDR BW, in DM365 DVR RDK, output from DM365 was 720x240 @ 60fps and externally deinterlacer+scaler was used for converting to 800x600 @ 60fps

    Q2. Can TVP5158 be patched to output only odd (or even) field instead of down-sampling as a simple de-interlacing?

    [TI] Yes, this is possible no change is needed in TVP5158, the driver can configure TVP5158 in Half-D1 mode and then drop odd fields and only use the even fields as CIF data, this will give better quality than using interlaced CIF mode of TVP5158. We have this support in TI TVP5158 drivers thats included in the DM365DVR RDK.


    Q3. Can TVP5158 be patched for horizontally-reversed output for specified channels for mirror applications ?
     It takes extra CPU/EDMA/memory bandwidth to have this done inside DM365.

    [TI] No, this is not possible to do in TVP5158 and this will be very expensive to do with CPU and EDMA.

    Q4. Can TVP5158 be patched to output line-interleaved 4 CVBS and 1 BT656 (total 5 different inputs) ?

    [TI] Do you mean 5 CH D1. No this is not possible. Is it possible to be in 4CH CIF + 1CH D1 mode, but there the 1Ch D1 is one of the 4CH CIFs. We have this feature in the TI TVP5158 drivers thats included in the DM365DVR RDK.

    Given below is the DVR RDK link, I dont know if you have seen this before
    http://www.udworks.com/home01/eg/product/sub11.php
    http://www.udworks.com/home01/eg/product/sub10.php

    regards
    Kedar


  • 0 in reply to Kedar Chitnis
    Expert 1625 points

    Hi Kedar,

    Q1. How to configure the resizer for a more smooth output ?
    [TI] Resizer when used in DDR IN one shot can give some problems due to DDR Bandwidth (BW), especially in multi-ch applications. ...skipped...
    [Yulin] Sorry, what I perceived in a 4CH CIF preview (combined in 2CHx2CH, resized to 640x480 inside a 800x480 frame buffer)
    is interlacing noise around moving edges, not random spikes.  What I mean "smooth" is "de-interlaced".


    Q2. Can TVP5158 be patched to output only odd (or even) field instead of down-sampling as a simple de-interlacing?
    [TI] Yes, this is possible no change is needed in TVP5158, the driver can configure TVP5158 in Half-D1 ...skipped...
    [Yulin] I know (and did) this trick.  Can this be done inside TVP5158 for lower bandwidth between TVP5158 and DM365 ?
    This do helps in deinterlacing (Q1), 8CH applications and/or cost down.


    Q3. Can TVP5158 be patched for horizontally-reversed output for specified channels for mirror applications ?
    [TI] No, this is not possible to do in TVP5158 and this will be very expensive to do with CPU and EDMA.

    Q4. Can TVP5158 be patched to output line-interleaved 4 CVBS and 1 BT656 (total 5 different inputs) ?
    [TI] Do you mean 5 CH D1. No this is not possible. ...skipped...

    [Yulin] Any roadmap of TVP5158 (and/or its descendant) to look forward to address Q3 and Q4 (and Q2) ?


    Given below is the DVR RDK link, I dont know if you have seen this before
    [Yulin] I know this DVR RDK.

    Thanks & regards,
    Yulin.

  • 0 in reply to Yulin
    TI__Genius 9101 points

    hi Yulin,

    Q1. How to configure the resizer for a more smooth output ?
    [TI] Resizer when used in DDR IN one shot can give some problems due to DDR Bandwidth (BW), especially in multi-ch applications. ...skipped...
    [Yulin] Sorry, what I perceived in a 4CH CIF preview (combined in 2CHx2CH, resized to 640x480 inside a 800x480 frame buffer)
    is interlacing noise around moving edges, not random spikes.  What I mean "smooth" is "de-interlaced".
    [TI] Oh ok, can you send a image of this, but basically we cant to any deinterlacing in DM365, you will need to use the trick of capture capturing half-D1 and skipping alternate fields.


    Q2. Can TVP5158 be patched to output only odd (or even) field instead of down-sampling as a simple de-interlacing?
    [TI] Yes, this is possible no change is needed in TVP5158, the driver can configure TVP5158 in Half-D1 ...skipped...
    [Yulin] I know (and did) this trick.  Can this be done inside TVP5158 for lower bandwidth between TVP5158 and DM365 ?
    This do helps in deinterlacing (Q1), 8CH applications and/or cost down.
    [TI] No this cannot be done inside TVP5158.


    Q3. Can TVP5158 be patched for horizontally-reversed output for specified channels for mirror applications ?
    [TI] No, this is not possible to do in TVP5158 and this will be very expensive to do with CPU and EDMA.
    [TI] Actually after thinking more on this you can mirror/flip using the resizer in DM365 while doing the YUV422 to YUV420 conversion.

    Q4. Can TVP5158 be patched to output line-interleaved 4 CVBS and 1 BT656 (total 5 different inputs) ?
    [TI] Do you mean 5 CH D1. No this is not possible. ...skipped...

    [Yulin] Any roadmap of TVP5158 (and/or its descendant) to look forward to address Q3 and Q4 (and Q2) ?

    [TI] No roadmap for Q2, Q3, Q4 in TVP5158

    regards

    Kedar