• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 97 subscribers
  • Views 967 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3354: OpenGL applications causing network problems

Ahmet OBALIOĞLU
Prodigy 120 points
Part Number: AM3354

Hello,

We have a server, client-based data collection project, and we use the AM3354 in this project.

We run the application first as a consol application and have not experienced any problems. We then tried adding the screen support to the same application.(Qt, Eglfs) And after this step we experienced speed drops and connection lost problems in the network connection. And we did some tests.

Test steps:

  • The download speed was tested with the wget command before running the OpenGL application. (10.8 M/s  > )
  • We run any OpenGL application (SGX demos or Qt demos)
  • We tested the download speed by running wget command again. (10 K/s < , or lost connection)
  • Run the following command while the OpenGL application is running, network speed normal (10.8 M/s  > )  (echo "4" > /sys/class/graphics/fb0/blank)

We have 2 different boards, one with display, the other one without display, with only Ethernet connection and CAN connection. We tested all the tests on 2 boards and got the same results. 

We tested the tests with the TI SDK and our own compilation and got the same results.

Do you have any suggestions?

Best Regards.

Ahmet

  • 0
    TI__Guru**** 393215 points
    Hi,

    Please follow the guidelines in this wiki and post the required information: processors.wiki.ti.com/.../5x_CPSW
  • 0 in reply to Biser Gatchev-XID
    Prodigy 120 points

    Hello,

    Thank you for the quick answer. We have tried on multiple kernels. (TI SDK 8, Yocto Krogoth, Our custom 3.14 build (Based on TI SDK 8.0)) 

    Kernel version and source, also include the results of this command: uname -a

    Linux MAGMANET 3.14.26-g358289d #1 Thu Mar 2 19:54:01 EET 2017 armv7l GNU/Linux

    File system, TI SDK or Arago/Yocto based filesytem

    We have tried 3 different rootfs TI SDK, Yocto and cutom BusyBox build.

    Custom board or TI board? Please include device tree source file.

    We tested on custom two boards. One is a board with only simple RJ45 output,  Other one is also screen support and different outputs. (We used variscite AM335x SOM on this boards)

    Fullscreen am33.txt Download 
    /*
 * Copyright (C) 2014 Variscite LTD - http://www.variscite.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Variscite AM335x SOM";
	compatible = "ti,var-som-am33", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	wl12xx_vmmc: fixedregulator@2 {
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		/* WLAN_EN GPIO for this board - Bank3, pin21 */
		gpio = <&gpio3 21 0>;

		/* WLAN card specific delay */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	vtt_fixed: fixedregulator@3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	vdd_bl_fixed: fixedregulator@4 {	
		compatible = "regulator-fixed";
		regulator-name = "vdd_bl";
		//regulator-min-microvolt = <1500000>;
		//regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	vmmc_fixed: fixedregulator@5 {
		compatible = "regulator-fixed";
		regulator-name = "vmmc_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};


	gpio_buttons: gpio_keys@0 {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;

		switch@1 {
			label = "button0";
			linux,code = <0x100>;
			gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 58 61 66 75 90 125 170 255>;
		default-brightness-level = <8>;
		power-supply = <&vdd_bl_fixed>;		
	};

	sound {
		compatible = "ti,da830-evm-audio";
		ti,model = "AM335x-EVM";
		ti,audio-codec = <&tlv320aic3106>;
		ti,mcasp-controller = <&mcasp0>;
		ti,codec-clock-rate = <24000000>;
		ti,audio-routing =
			"Headphone Jack",       "HPLOUT",
			"Headphone Jack",       "HPROUT",
			"LINE1L",               "Line In",
			"LINE1R",               "Line In";
	};

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&lcd_pins_default>;
		pinctrl-1 = <&lcd_pins_sleep>;
		status = "okay";
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};

		display-timings {
			800x480 {
				hactive = <800>;
				vactive = <480>;
				hback-porch     = <39>;
				hfront-porch    = <39>;
				hsync-len = <47>;
				vback-porch = <29>;
				vfront-porch = <13>;
				vsync-len = <2>;
				clock-frequency = <30000000>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};

	wlcore {
		compatible = "wlcore";
		gpio = <116>; /* Bank3, pin20 */
		pinctrl-names = "default";
	};

	kim {
		compatible = "kim";
		nshutdown_gpio = <105>; /* Bank3, pin21 */
		dev_name = "/dev/ttyO1";
		flow_cntrl = <1>;
		baud_rate = <3000000>;
	};

	btwilink {
		compatible = "btwilink";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout1_pin &gpio_keys_s0>;

	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
#if 0
			0x20 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
			0x24 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
			0x28 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
			0x2c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
			0x30 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
			0x34 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
			0x38 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
			0x3c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
#endif
			0xa0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
			0xa4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
			0xa8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
			0xac (PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
			0xb0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
			0xb4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
			0xb8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
			0xbc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
			0xc0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
			0xc4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
			0xc8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
			0xcc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
			0xd0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
			0xd4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
			0xd8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
			0xdc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
			0xe0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
			0xe4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			0xa0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data0.lcd_data0 */
			0xa4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data1.lcd_data1 */
			0xa8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data2.lcd_data2 */
			0xac (PULL_DISABLE | MUX_MODE7)		/* lcd_data3.lcd_data3 */
			0xb0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data4.lcd_data4 */
			0xb4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data5.lcd_data5 */
			0xb8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data6.lcd_data6 */
			0xbc (PULL_DISABLE | MUX_MODE7)		/* lcd_data7.lcd_data7 */
			0xc0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data8.lcd_data8 */
			0xc4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data9.lcd_data9 */
			0xc8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data10.lcd_data10 */
			0xcc (PULL_DISABLE | MUX_MODE7)		/* lcd_data11.lcd_data11 */
			0xd0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data12.lcd_data12 */
			0xd4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data13.lcd_data13 */
			0xd8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data14.lcd_data14 */
			0xdc (PULL_DISABLE | MUX_MODE7)		/* lcd_data15.lcd_data15 */
			0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
			0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x158 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			0x15c (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins_default: pinmux_uart1_pins_default {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT | MUX_MODE0)			/* uart1_ctsn.uart1_ctsn */
			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT | MUX_MODE0)			/* uart1_txd.uart1_txd */
		>;
	};

	uart1_pins_sleep: pinmux_uart1_pins_sleep {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x17C (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	clkout1_pin: pinmux_clkout1_pin {
		pinctrl-single,pins = <
			0x1b0 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr0.clkout1 */
		>;
	};

	nandflash_pins_default: pinmux_nandflash_pins_default {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_ben0_cle.gpmc_ben0_cle */
		>;
	};

	nandflash_pins_sleep: pinmux_nandflash_pins_sleep {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	ecap2_pins_default: backlight_pins {
		pinctrl-single,pins = <
			0x19c 0x4	/* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
		>;
	};

	ecap2_pins_sleep: ecap2_pins_sleep {
		pinctrl-single,pins = <
			0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkr.ecap2_in_pwm2_out */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
		0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs_dv */
		0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
		0x114 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txen.rmii1_txen */
		0x124 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txd1.rmii1_txd1 */
		0x128 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txd0.rmii1_txd0 */
		0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
		0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
		0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
		0x138 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxd2.gpio2_19 */

		/* Slave 2 */
		0x40 (PIN_OUTPUT | MUX_MODE2)	           /* gpmc_a0.rgmii2_tctl */
		0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	   /* gpmc_a1.rgmii2_rctl */
		0x48 (PIN_OUTPUT | MUX_MODE2)	           /* gpmc_a2.rgmii2_td3 */
		0x4c (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a3.rgmii2_td2 */
		0x50 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a4.rgmii2_td1 */
		0x54 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a5.rgmii2_td0 */
		0x58 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a6.rgmii2_tclk */
		0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a7.rgmii2_rclk */
		0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a8.rgmii2_rd3 */
		0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a9.rgmii2_rd2 */
		0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a10.rgmii2_rd1 */
		0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a11.rgmii2_rd0 */
		0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_col.rmii2_refclk */
		0x130 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxclk.gpio3_10 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
		/* Slave 1 reset value */
		0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x138 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxd2.gpio2_19 */

		/* Slave 2 reset value */
		0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 
		0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins_default: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			0x78  (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ben1.gpio1_28 */
			0x134 (PIN_INPUT_PULLUP | MUX_MODE7)	/* mii1_rxd3.gpio2_18 */
		>;
	};

	mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x78  (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mcasp0_pins: mcasp0_pins {
		pinctrl-single,pins = <
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_aclkx.mcasp0_aclkx */
			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_fsx.mcasp0_fsx */
			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mcasp0_aclkr.mcasp0_axr2 */
			0x1A4 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mcasp0_fsr.mcasp0_axr3 */
		>;
	};

	mcasp0_sleep_pins: mcasp0_sleep_pins {
		pinctrl-single,pins = <
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	/* wl12xx/wl18xx card on mmc1 */

	mmc2_pins_default: pinmux_mmc2_pins_default {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
			0x80 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
		>;
	};
	
	mmc2_pins_sleep: pinmux_mmc2_pins_sleep {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad11.mmc1_dat3 */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_csn2.mmc1_cmd */
			0x80 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_csn1.mmc1_clk */
		>;
	};	

		/* wl12xx/wl18xx card enable/irq GPIOs. */
	wl12xx_gpio_default: pinmux_wl12xx_gpio_default {
		pinctrl-single,pins = <
			0x1AC 0x07	/* mcasp0_ahclkx.gpio3_21, OUTPUT | MODE7 */
			0x1A8 0x27	/* mcasp0_axr1.gpio3_20, INPUT | MODE7 */
			0x12C 0x17	/* mii1_txclk.gpio3_9, OUTPUT_PULLUP | MODE7 */
		>;
	};

	wl12xx_gpio_sleep: pinmux_wl12xx_gpio_sleep {
		pinctrl-single,pins = <
			0x1AC (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21, OUTPUT | MODE7 */
			0x1A8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_axr1.gpio3_20, INPUT | MODE7 */
			0x12C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mii1_txclk.gpio3_9, OUTPUT_PULLUP | MODE7 */
		>;
	};
	
	/* ctw6120 irq GPIO. */
	ctw6120_pins: pinmux_ctw6120_pins {
		pinctrl-single,pins = <
			0x154 0x27	/* spi0_d0.gpio0_3, INPUT | MODE7 */
		>;
	};
	dcan0_default: dcan0_default_pins {
		pinctrl-single,pins = <
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	 /* AM33XX_CONTROL_PADCONF_MII1_TXD3_OFFSET			0x091C */
			0x120 (PIN_INPUT_PULLUP | MUX_MODE1)      /* AM33XX_CONTROL_PADCONF_MII1_TXD2_OFFSET			0x0920 */
		>;
	};

	spi1_pins_default: pinmux_spi1_pins_default {
		pinctrl-single,pins = <
			0x164 (PIN_INPUT | MUX_MODE4)	/* ECAP0_IN_PWM0_OUT: SPI CLK */
			0x168 (PIN_INPUT | MUX_MODE4)	/* UART0_CTSN: SPI1_D0 - We set to SPI1_RX*/
			0x16C (PIN_OUTPUT | MUX_MODE4)	/* UART0_RTSN: SPI1_D1 - We set to SPI1_TX*/
			0x19C (PIN_OUTPUT | MUX_MODE3)	/* MCASP0_AHCLKR: SPI1_CS */
		>;
	};

	spi1_pins_sleep: pinmux_spi1_pins_sleep {
		pinctrl-single,pins = <
			0x164 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* ECAP0_IN_PWM0_OUT: SPI CLK */
			0x168 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* UART0_CTSN: SPI1_D0 - We set to SPI1_TX*/
			0x16C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* UART0_RTSN: SPI1_D1 - We set to SPI1_RX*/
			0x19C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* MCASP0_AHCLKR: SPI1_CS */
		>;
	};

       gpio_keys_s0: gpio_keys_s0 {
               pinctrl-single,pins = <
                       0x118 (PIN_INPUT_PULLUP | MUX_MODE7)    /* GPIO3_4 */
               >;
       };
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart1_pins_default>;
	pinctrl-1 = <&uart1_pins_sleep>;

	status = "okay";
};

&uart2 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart2_pins_default>;
	pinctrl-1 = <&uart2_pins_sleep>;
	*/
	status = "okay";
};

&uart3 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart3_pins_default>;
	pinctrl-1 = <&uart3_pins_sleep>;
	*/
	status = "okay";
};

&uart4 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart4_pins_default>;
	pinctrl-1 = <&uart4_pins_sleep>;
	*/
	status = "okay";
};

&uart5 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart5_pins_default>;
	pinctrl-1 = <&uart5_pins_sleep>;
	*/
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

};


&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	tps: tps@2d {
		status = "okay";
		reg = <0x2d>;
	};

#if 0 
	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};
#endif//0

	tlv320aic3106: tlv320aic3106@1b {
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};

	ctw6120_tsc@38 {
		compatible = "var,ctw6120-tsc";
		pinctrl-names = "default";
		pinctrl-0 = <&ctw6120_pins>;
		reg = <0x38>;
		interrupt-parent = <&gpio0>;
		interrupts = <3 IRQ_TYPE_NONE>;
		

		x-size = <800>;
		y-size = <480>;
	};
};

&usb {
	status = "okay";

	control@44e10620 {
		status = "okay";
	};

	usb-phy@47401300 {
		status = "okay";
	};

	usb@47401000 {
		status = "okay";
		dr_mode = "host";
	};

	dma-controller@47402000  {
		status = "okay";
	};

	usb-phy@47401b00 {
		status = "okay";
	};

	usb@47401800 {
		status = "okay";
                //dr_mode = "otg";
                dr_mode = "peripheral";
	};
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
#if 0
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&ecap2_pins_default>;
		pinctrl-1 = <&ecap2_pins_sleep>;
#endif
	};
};

&wkup_m3 {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&nandflash_pins_default>;
	pinctrl-1 = <&nandflash_pins_sleep>;
	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
	nand@0,0 {
		reg = <0 0 0>; /* CS0, offset 0 */
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		ti,nand-ecc-opt= "bch8";
		ti,elm-id = <&elm>;
		/* MTD partition table */
                /* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x000020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot-spl-os";
			reg = <0x00080000 0x00040000>;
		};
		partition@5 {
			label = "NAND.u-boot";
			reg = <0x000C0000 0x00100000>;
		};
		partition@6 {
			label = "NAND.u-boot-env";
			reg = <0x001C0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.u-boot-env.backup1";
			reg = <0x001E0000 0x00020000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00200000 0x00800000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00A00000 0x3F600000>;
		};
		partition@10 {
			label = "Android NAND.u-boot";
			reg = <0x00080000 0x00260000>;
		};
		partition@11 {
			label = "Android NAND.u-boot-env";
			reg = <0x000000260000 0x000000280000>;
		};
		partition@12 {
			label = "Android Kernel";
			reg = <0x000000280000 0x000000780000>;
		};
		partition@13 {
			label = "Android File System";
			reg = <0x000000780000 0x000010000000>;
		};
	};
};

&lcdc {
	status = "okay";
};

#include "tps65910.dtsi"

&dcan0 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan0_default>;
	status = "okay";
};


&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	rtc:0 {
		compatible = "ti,tps65910-rtc";
		interrupts = <0>;
	};

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <7>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};


&phy_sel {
	rmii-clock-ext;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_fixed>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_sleep>;
	cd-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&wl12xx_vmmc>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc2_pins_default &wl12xx_gpio_default>;
	pinctrl-1 = <&mmc2_pins_sleep &wl12xx_gpio_sleep>;
	ti,non-removable;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wlcore";
		reg = <2>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 IRQ_TYPE_NONE>;

		/* if a 12xx card is there, configure the clock to
		   WL12XX_REFCLOCK_38_XTAL */
		board-ref-clock = <4>;
		status = "okay";
	};

};

&edma {
	ti,edma-xbar-event-map = /bits/ 16 <1 12
					    2 13>;
};

&mcasp0 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp0_pins>;
	pinctrl-1 = <&mcasp0_sleep_pins>;

	status = "okay";

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 16 serializer */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		0 0 2 1
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};


&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <180>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x21 0x12 0x33>;
		ti,charge-delay = <0x700>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};

&spi1 {
	status = "okay";

#if 0	/* NOTE: In order to use SPI on VAR-SOM-AM33 CustomBoard -
	1) Need to remove R9 and R10 resistors from the CustomBoard.
	2) Need to also remove U21 from the CustomBoard. */

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi1_pins_default>;
	pinctrl-1 = <&spi1_pins_sleep>;
#endif
	spidev0: spi@0 {
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
		spi-cpha;
	};

	spidev1: spi@1 {
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};
};

    Console log of the boot process that includes U-Boot and the Kernel.

    Fullscreen am33_boot.txt Download 
    U-Boot 2013.10-gadf9a14 (Mar 16 2015 - 14:29:28)

I2C:   ready
DRAM:  256 MiB
Variscite AM33 SOM revision 1.3 detected
NAND:  256 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
reading u-boot_env.txt

** Unable to read "u-boot_env.txt" from mmc0:1 **
Using default environment

Net:   <ethaddr> not set. Validating first E-fuse MAC
Could not get PHY for cpsw: addr 7
Found Micrel KS8051/KS8081 PHY
cpsw
Hit any key to stop autoboot:  0
mmc0 is current device
Scanning mmc 0...
4336344 bytes read in 295 ms (14 MiB/s)
39153 bytes read in 11 ms (3.4 MiB/s)
mmc0 is current device
SD/MMC found on device 0
reading uEnv.txt
** Unable to read file uEnv.txt **
4336344 bytes read in 294 ms (14.1 MiB/s)
39153 bytes read in 11 ms (3.4 MiB/s)
Kernel image @ 0x80200000 [ 0x000000 - 0x422ad8 ]
## Flattened Device Tree blob at 80f80000
   Booting using the fdt blob at 0x80f80000
   Loading Device Tree to 8f322000, end 8f32e8f0 ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 3.14.26-g358289d (root@qt5-5-x-host) (gcc version 4.7.3 20130226 (prerelease) (crosstool-NG linaro-1.13.1-4.7-2013.03-20130313 - Linaro GCC 2013.03) ) #1 Thu Mar 2 19:54:01 EET 2017
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: Variscite AM335x SOM
[    0.000000] cma: CMA: reserved 24 MiB at 8d800000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (sgx neon )
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 64768
[    0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 225280K/261120K available (5871K kernel code, 305K rwdata, 2104K rodata, 262K init, 231K bss, 35840K reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff000000   ( 744 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc07d205c   (7977 kB)
[    0.000000]       .init : 0xc07d3000 - 0xc0814b94   ( 263 kB)
[    0.000000]       .data : 0xc0816000 - 0xc08627e0   ( 306 kB)
[    0.000000]        .bss : 0xc08627e0 - 0xc089c400   ( 232 kB)
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] Total of 128 interrupts on 1 active controller
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000015] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956969942ns
[    0.000038] OMAP clocksource: timer1 at 24000000 Hz
[    0.000343] Console: colour dummy device 80x30
[    0.000381] Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
[    0.059150] pid_max: default: 32768 minimum: 301
[    0.059275] Security Framework initialized
[    0.059339] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.059353] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.069660] CPU: Testing write buffer coherency: ok
[    0.070060] Setting up static identity map for 0x805c21e8 - 0x805c2258
[    0.071178] devtmpfs: initialized
[    0.073302] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.083103] omap_hwmod: tptc0 using broken dt data from edma
[    0.083212] omap_hwmod: tptc1 using broken dt data from edma
[    0.083309] omap_hwmod: tptc2 using broken dt data from edma
[    0.087911] omap_hwmod: debugss: _wait_target_disable failed
[    0.144855] pinctrl core: initialized pinctrl subsystem
[    0.146088] regulator-dummy: no parameters
[    0.148793] NET: Registered protocol family 16
[    0.151355] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.154779] cpuidle: using governor ladder
[    0.154798] cpuidle: using governor menu
[    0.164637] syscon 44e10000.control_module: regmap [mem 0x44e10000-0x44e107fb] registered
[    0.165511] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.167186] platform 49000000.edma: alias fck already exists
[    0.167215] platform 49000000.edma: alias fck already exists
[    0.167234] platform 49000000.edma: alias fck already exists
[    0.168649] OMAP GPIO hardware version 0.1
[    0.185793] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    0.185823] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    0.193219] No ATAGs?
[    0.193246] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.228800] bio: create slab <bio-0> at 0
[    0.249347] edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver
[    0.250719] vbat: 5000 mV
[    0.251222] lis3_reg: no parameters
[    0.251816] wlan-en-regulator: 1800 mV
[    0.252364] vtt: 1500 mV
[    0.252882] vdd_bl: no parameters
[    0.253338] vmmc_fixed: 3300 mV
[    0.257981] vgaarb: loaded
[    0.258659] i2c-core: driver [palmas] using legacy suspend method
[    0.258672] i2c-core: driver [palmas] using legacy resume method
[    0.259663] SCSI subsystem initialized
[    0.261565] usbcore: registered new interface driver usbfs
[    0.261809] usbcore: registered new interface driver hub
[    0.262060] usbcore: registered new device driver usb
[    0.264200] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    0.265692] tps65910 1-002d: No interrupt support, no core IRQ
[    0.279211] vrtc: 1800 mV
[    0.279822] vrtc: supplied by vbat
[    0.289215] vio: at 1500 mV
[    0.289333] vio: supplied by vbat
[    0.300103] vdd_mpu: 912 <--> 1375 mV at 1137 mV
[    0.300211] vdd_mpu: supplied by vbat
[    0.310101] vdd_core: 912 <--> 1150 mV at 1137 mV
[    0.310209] vdd_core: supplied by vbat
[    0.319203] vdd3: 5000 mV
[    0.329206] vdig1: at 1800 mV
[    0.329318] vdig1: supplied by vbat
[    0.339208] vdig2: at 1800 mV
[    0.339319] vdig2: supplied by vbat
[    0.349207] vpll: at 1800 mV
[    0.349311] vpll: supplied by vbat
[    0.359206] vdac: at 1800 mV
[    0.359307] vdac: supplied by vbat
[    0.369204] vaux1: at 1800 mV
[    0.369310] vaux1: supplied by vbat
[    0.379205] vaux2: at 3300 mV
[    0.379308] vaux2: supplied by vbat
[    0.389209] vaux33: at 3300 mV
[    0.389317] vaux33: supplied by vbat
[    0.399208] vmmc: 1800 <--> 3300 mV at 3300 mV
[    0.399311] vmmc: supplied by vbat
[    0.401195] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz
[    0.401864] pps_core: LinuxPPS API ver. 1 registered
[    0.401879] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.402049] PTP clock support registered
[    0.404546] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.405778] Advanced Linux Sound Architecture Driver Initialized.
[    0.407709] Switched to clocksource timer1
[    0.433144] NET: Registered protocol family 2
[    0.434289] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.434338] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.434374] TCP: Hash tables configured (established 2048 bind 2048)
[    0.434450] TCP: reno registered
[    0.434467] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.434491] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.434729] NET: Registered protocol family 1
[    0.435163] RPC: Registered named UNIX socket transport module.
[    0.435178] RPC: Registered udp transport module.
[    0.435186] RPC: Registered tcp transport module.
[    0.435194] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.436508] hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
[    0.440231] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.657076] VFS: Disk quotas dquot_6.5.2
[    0.657154] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    0.657851] NFS: Registering the id_resolver key type
[    0.657944] Key type id_resolver registered
[    0.657955] Key type id_legacy registered
[    0.658004] jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
[    0.658220] msgmni has been set to 488
[    0.660071] NET: Registered protocol family 38
[    0.660121] io scheduler noop registered
[    0.660131] io scheduler deadline registered
[    0.660156] io scheduler cfq registered (default)
[    0.670868] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    0.674853] omap_uart 44e09000.serial: no wakeirq for uart0
[    0.675034] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 88, base_baud = 3000000) is a OMAP UART0
[    1.432832] console [ttyO0] enabled
[    1.437315] omap_uart 48022000.serial: no wakeirq for uart0
[    1.443458] 48022000.serial: ttyO1 at MMIO 0x48022000 (irq = 89, base_baud = 3000000) is a OMAP UART1
[    1.453811] omap_uart 48024000.serial: no wakeirq for uart0
[    1.459912] 48024000.serial: ttyO2 at MMIO 0x48024000 (irq = 90, base_baud = 3000000) is a OMAP UART2
[    1.470250] omap_uart 481a6000.serial: no wakeirq for uart0
[    1.476299] 481a6000.serial: ttyO3 at MMIO 0x481a6000 (irq = 60, base_baud = 3000000) is a OMAP UART3
[    1.486630] omap_uart 481a8000.serial: no wakeirq for uart0
[    1.492717] 481a8000.serial: ttyO4 at MMIO 0x481a8000 (irq = 61, base_baud = 3000000) is a OMAP UART4
[    1.503032] omap_uart 481aa000.serial: no wakeirq for uart0
[    1.509114] 481aa000.serial: ttyO5 at MMIO 0x481aa000 (irq = 62, base_baud = 3000000) is a OMAP UART5
[    1.520560] omap_rng 48310000.rng: OMAP Random Number Generator ver. 20
[    1.528077] [drm] Initialized drm 1.1.0 20060810
[    1.536173] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    1.543189] [drm] No driver support for vblank timestamp query.
[    1.605892] Console: switching to colour frame buffer device 100x30
[    1.619466] tilcdc 4830e000.lcdc: fb0:  frame buffer device
[    1.625323] tilcdc 4830e000.lcdc: registered panic notifier
[    1.631207] [drm] Initialized tilcdc 1.0.0 20121205 on minor 0
[    1.652630] brd: module loaded
[    1.663095] loop: module loaded
[    1.666765] (stk) :sysfs entries created
[    1.671074] (stk) : debugfs entries created
[    1.675628] (hci_tty): inside hci_tty_init
[    1.680772] (hci_tty): allocated 249, 0
[    1.690429] mtdoops: mtd device (mtddev=name/number) must be supplied
[    1.698476] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[    1.705161] nand: Micron MT29F2G08ABAEAWP
[    1.709410] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[    1.715362] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
[    1.721088] 14 ofpart partitions found on MTD device omap2-nand.0
[    1.727498] Creating 14 MTD partitions on "omap2-nand.0":
[    1.733196] 0x000000000000-0x000000020000 : "NAND.SPL"
[    1.740791] 0x000000020000-0x000000040000 : "NAND.SPL.backup1"
[    1.749003] 0x000000040000-0x000000060000 : "NAND.SPL.backup2"
[    1.757047] 0x000000060000-0x000000080000 : "NAND.SPL.backup3"
[    1.765175] 0x000000080000-0x0000000c0000 : "NAND.u-boot-spl-os"
[    1.773516] 0x0000000c0000-0x0000001c0000 : "NAND.u-boot"
[    1.781882] 0x0000001c0000-0x0000001e0000 : "NAND.u-boot-env"
[    1.789851] 0x0000001e0000-0x000000200000 : "NAND.u-boot-env.backup1"
[    1.798608] 0x000000200000-0x000000a00000 : "NAND.kernel"
[    1.812754] 0x000000a00000-0x000040000000 : "NAND.file-system"
[    1.818935] mtd: partition "NAND.file-system" extends beyond the end of device "omap2-nand.0" -- size truncated to 0xf600000
[    2.036228] 0x000000080000-0x0000002e0000 : "Android NAND.u-boot"
[    2.046507] 0x000000260000-0x0000004e0000 : "Android NAND.u-boot-env"
[    2.057434] 0x000000280000-0x000000a00000 : "Android Kernel"
[    2.071440] 0x000000780000-0x000010780000 : "Android File System"
[    2.077903] mtd: partition "Android File System" extends beyond the end of device "omap2-nand.0" -- size truncated to 0xf880000
[    2.308389] usbcore: registered new interface driver asix
[    2.314362] usbcore: registered new interface driver ax88179_178a
[    2.320985] usbcore: registered new interface driver cdc_ether
[    2.327413] usbcore: registered new interface driver smsc95xx
[    2.333658] usbcore: registered new interface driver net1080
[    2.339847] usbcore: registered new interface driver cdc_subset
[    2.346316] usbcore: registered new interface driver zaurus
[    2.352456] usbcore: registered new interface driver cdc_ncm
[    2.359129] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    2.365995] ehci-pci: EHCI PCI platform driver
[    2.370958] ehci-omap: OMAP-EHCI Host Controller driver
[    2.377128] usbcore: registered new interface driver cdc_wdm
[    2.383386] usbcore: registered new interface driver usb-storage
[    2.391228] mousedev: PS/2 mouse device common for all mice
[    2.398744] ctw6120_tsc: probe of 1-0038 failed with error -5
[    2.406389] input: ti-tsc as /devices/ocp.3/44e0d000.tscadc/TI-am335x-tsc/input/input0
[    2.417475] omap_rtc 44e3e000.rtc: rtc core: registered 44e3e000.rtc as rtc0
[    2.425054] 44e3e000.rtc: already running
[    2.441533] tps65910-rtc tps65910-rtc: rtc core: registered tps65910-rtc as rtc1
[    2.449601] i2c /dev entries driver
[    2.454218] Driver for 1-wire Dallas network protocol.
[    2.462678] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    2.590564] mmc0: new high speed SDHC card at address aaaa
[    2.597079] mmcblk0: mmc0:aaaa SL08G 7.40 GiB
[    2.603601]  mmcblk0: p1 p2
[    2.628813] ledtrig-cpu: registered to indicate activity on CPUs
[    2.638723] omap-aes 53500000.aes: OMAP AES hw accel rev: 3.2
[    2.646690] omap-sham 53100000.sham: hw accel on OMAP rev 4.3
[    2.656092] usbcore: registered new interface driver usbhid
[    2.661995] usbhid: USB HID core driver
[    2.669948] oprofile: using arm/armv7
[    2.673920] nf_conntrack version 0.5.0 (3904 buckets, 15616 max)
[    2.681100] ip_tables: (C) 2000-2006 Netfilter Core Team
[    2.686823] TCP: cubic registered
[    2.690348] Initializing XFRM netlink socket
[    2.694866] NET: Registered protocol family 17
[    2.699597] NET: Registered protocol family 15
[    2.704393] Key type dns_resolver registered
[    2.711210] PM: bootloader does not support rtc-only!
[    2.716565] ThumbEE CPU extension supported.
[    2.721223] Registering SWP/SWPB emulation handler
[    2.728221] wlan-en-regulator: disabling
[    2.732375] lis3_reg: disabling
[    2.735676] regulator-dummy: disabling
[    2.797746] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6
[    2.804167] davinci_mdio 4a101000.mdio: detected phy mask fffffffc
[    2.812319] libphy: 4a101000.mdio: probed
[    2.816552] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver Micrel KSZ8081 or KSZ8091
[    2.826658] davinci_mdio 4a101000.mdio: phy[1]: device 4a101000.mdio:01, driver Micrel KSZ8081 or KSZ8091
[    2.837820] cpsw 4a100000.ethernet: Detected MACID = d0:ff:50:a2:52:88
[    2.846149] cpsw 4a100000.ethernet: cpsw: Detected MACID = d0:ff:50:a2:52:8a
[    2.856174] input: gpio_keys.10 as /devices/gpio_keys.10/input/input1
[    2.867030] tps65910-rtc tps65910-rtc: setting system clock to 2000-01-03 22:48:59 UTC (946939739)
[    2.880545]  remoteproc0: wkup_m3 is available
[    2.885236]  remoteproc0: Note: remoteproc is still under development and considered experimental.
[    2.894724]  remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed.
[    2.905820]  remoteproc0: Direct firmware load failed with error -2
[    2.912450]  remoteproc0: Falling back to user helper
[    2.919032] ALSA device list:
[    2.922181]   No soundcards found.
[    2.937440] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    2.946108] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[    2.956590] devtmpfs: mounted
[    2.960249] Freeing unused kernel memory: 260K (c07d3000 - c0814000)

    ethtool <interface such as eth0 or eth1>

    Settings for eth0:
    Supported ports: [ TP MII ]
    Supported link modes: 10baseT/Half 10baseT/Full
    100baseT/Half 100baseT/Full
    Supported pause frame use: Symmetric
    Supports auto-negotiation: Yes
    Advertised link modes: 10baseT/Half 10baseT/Full
    100baseT/Half 100baseT/Full
    Advertised pause frame use: Symmetric
    Advertised auto-negotiation: Yes
    Link partner advertised link modes: 10baseT/Half 10baseT/Full
    100baseT/Half 100baseT/Full
    Link partner advertised pause frame use: Symmetric
    Link partner advertised auto-negotiation: Yes
    Speed: 100Mb/s
    Duplex: Full
    Port: MII
    PHYAD: 0
    Transceiver: external
    Auto-negotiation: on
    Supports Wake-on: d
    Wake-on: d
    Current message level: 0x00000000 (0)

    Link detected: yes

    ethtool -S <interface such as eth0 or eth1> (Before Running OpenGL)

    ~ # ethtool -S eth0
    NIC statistics:
    Good Rx Frames: 161446
    Broadcast Rx Frames: 48
    Multicast Rx Frames: 856
    Pause Rx Frames: 0
    Rx CRC Errors: 334
    Rx Align/Code Errors: 565
    Oversize Rx Frames: 0
    Rx Jabbers: 0
    Undersize (Short) Rx Frames: 0
    Rx Fragments: 0
    Rx Octets: 243732780
    Good Tx Frames: 80290
    Broadcast Tx Frames: 1
    Multicast Tx Frames: 0
    Pause Tx Frames: 0
    Deferred Tx Frames: 0
    Collisions: 0
    Single Collision Tx Frames: 0
    Multiple Collision Tx Frames: 0
    Excessive Collisions: 0
    Late Collisions: 0
    Tx Underrun: 0
    Carrier Sense Errors: 0
    Tx Octets: 5674238
    Rx + Tx 64 Octet Frames: 15
    Rx + Tx 65-127 Octet Frames: 80441
    Rx + Tx 128-255 Octet Frames: 165
    Rx + Tx 256-511 Octet Frames: 689
    Rx + Tx 512-1023 Octet Frames: 125
    Rx + Tx 1024-Up Octet Frames: 161200
    Net Octets: 250770707
    Rx Start of Frame Overruns: 86
    Rx Middle of Frame Overruns: 0
    Rx DMA Overruns: 86
    Rx DMA chan: head_enqueue: 1
    Rx DMA chan: tail_enqueue: 160567
    Rx DMA chan: pad_enqueue: 0
    Rx DMA chan: misqueued: 0
    Rx DMA chan: desc_alloc_fail: 0
    Rx DMA chan: pad_alloc_fail: 0
    Rx DMA chan: runt_receive_buf: 0
    Rx DMA chan: runt_transmit_buf: 0
    Rx DMA chan: empty_dequeue: 0
    Rx DMA chan: busy_dequeue: 310657
    Rx DMA chan: good_dequeue: 160504
    Rx DMA chan: requeue: 1
    Rx DMA chan: teardown_dequeue: 0
    Tx DMA chan: head_enqueue: 78518
    Tx DMA chan: tail_enqueue: 1772
    Tx DMA chan: pad_enqueue: 0
    Tx DMA chan: misqueued: 1772
    Tx DMA chan: desc_alloc_fail: 0
    Tx DMA chan: pad_alloc_fail: 0
    Tx DMA chan: runt_receive_buf: 0
    Tx DMA chan: runt_transmit_buf: 3
    Tx DMA chan: empty_dequeue: 389134
    Tx DMA chan: busy_dequeue: 0
    Tx DMA chan: good_dequeue: 80290
    Tx DMA chan: requeue: 78518
    Tx DMA chan: teardown_dequeue: 0

     

    wget command result: (Before Running OpenGL)

    100%[======================================>] 104,857,600 11.2M/s   in 9.0s

     

    ethtool -S <interface such as eth0 or eth1> (After Running OpenGL)

    ethtool -S eth0
    NIC statistics:
    Good Rx Frames: 162814
    Broadcast Rx Frames: 48
    Multicast Rx Frames: 932
    Pause Rx Frames: 0
    Rx CRC Errors: 487
    Rx Align/Code Errors: 943
    Oversize Rx Frames: 0
    Rx Jabbers: 0
    Undersize (Short) Rx Frames: 0
    Rx Fragments: 0
    Rx Octets: 245704318
    Good Tx Frames: 81571
    Broadcast Tx Frames: 1
    Multicast Tx Frames: 0
    Pause Tx Frames: 0
    Deferred Tx Frames: 0
    Collisions: 0
    Single Collision Tx Frames: 0
    Multiple Collision Tx Frames: 0
    Excessive Collisions: 0
    Late Collisions: 0
    Tx Underrun: 0
    Carrier Sense Errors: 0
    Tx Octets: 5774953
    Rx + Tx 64 Octet Frames: 41
    Rx + Tx 65-127 Octet Frames: 81714
    Rx + Tx 128-255 Octet Frames: 174
    Rx + Tx 256-511 Octet Frames: 762
    Rx + Tx 512-1023 Octet Frames: 125
    Rx + Tx 1024-Up Octet Frames: 162999
    Net Octets: 253633475
    Rx Start of Frame Overruns: 86
    Rx Middle of Frame Overruns: 0
    Rx DMA Overruns: 86
    Rx DMA chan: head_enqueue: 1
    Rx DMA chan: tail_enqueue: 161859
    Rx DMA chan: pad_enqueue: 0
    Rx DMA chan: misqueued: 0
    Rx DMA chan: desc_alloc_fail: 0
    Rx DMA chan: pad_alloc_fail: 0
    Rx DMA chan: runt_receive_buf: 0
    Rx DMA chan: runt_transmit_buf: 0
    Rx DMA chan: empty_dequeue: 0
    Rx DMA chan: busy_dequeue: 312397
    Rx DMA chan: good_dequeue: 161796
    Rx DMA chan: requeue: 1
    Rx DMA chan: teardown_dequeue: 0
    Tx DMA chan: head_enqueue: 79423
    Tx DMA chan: tail_enqueue: 2148
    Tx DMA chan: pad_enqueue: 0
    Tx DMA chan: misqueued: 2148
    Tx DMA chan: desc_alloc_fail: 0
    Tx DMA chan: pad_alloc_fail: 0
    Tx DMA chan: runt_receive_buf: 0
    Tx DMA chan: runt_transmit_buf: 15
    Tx DMA chan: empty_dequeue: 391779
    Tx DMA chan: busy_dequeue: 0
    Tx DMA chan: good_dequeue: 81571
    Tx DMA chan: requeue: 79423
    Tx DMA chan: teardown_dequeue: 0

    wget command result: (After Running OpenGL)

    0% [                                       ] 272,962     29.2K/s  eta 1h 47m

    1% [                                       ] 1,419,689   16.9K/s  eta 75m 36s

    wget command result: (After echo "1" > /sys/class/graphics/fb0/blank while running OpenGL application)

    100%[======================================>] 104,857,600 11.2M/s   in 8.9s

    ifconfig:

    ifconfig
    eth0 Link encap:Ethernet HWaddr D0:FF:50:A2:52:88
    inet addr:192.168.2.10 Bcast:192.168.2.255 Mask:255.255.255.0
    UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
    RX packets:234406 errors:0 dropped:0 overruns:0 frame:0
    TX packets:100312 errors:0 dropped:0 overruns:0 carrier:0
    collisions:0 txqueuelen:1000
    RX bytes:354503553 (338.0 MiB) TX bytes:6687443 (6.3 MiB)
    Interrupt:56

    Best Regards.

  • 0 in reply to Ahmet OBALIOĞLU
    TI__Mastermind 40080 points

    Thank you for the supplying the logs.

    From the statistics portion one of the issues you are facing is CRC and Alignment errors. CRC errors indicate corrupted frames, this could be as simple as a bad cable all the way to board layout.

    The first reading:

    Rx CRC Errors: 334
    Rx Align/Code Errors: 565

    The second reading:

    Rx CRC Errors: 487
    Rx Align/Code Errors: 943

    wget uses tcp, since there is some CRC/alignment errors that probablty means a lot of retries which will bring down your throughput.

  • 0 in reply to Schuyler Patton
    Prodigy 120 points
    Hello,

    Thank you, I will work on the layout.

    But why is the network speed so dropping only when the OpenGL application is running? There is no such problem in Qt applications that use DirectFB or in non-OpenGL applications like ts_calibrate.

    I thought first of all that network signals could be affected by LCD signals. And I tried it on a different board with RJ45 output and no LCD pins connected. But the result did not change.

    Best regards.