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I am attempting to run a simple test loop but it is obvious that I am not clearing the interrupts because the PRU cycles at full speed. The code to set up the PRU is
/* Waking up the PRU instance. */
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_PRU, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);
HWREG(SOC_PRUCORE_0_REGS) = 0; // halt PRU0
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_CHANMAP0) = 3;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_CHANMAP1) = 12;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_HOSTMAP0) = 0x100;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_STATCLRINT0) = -1;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_HSTINTENIDXSET) = 0;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_HSTINTENIDXSET) = 1;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_GLBLEN) = 1;
HWREG(SOC_PRUINTC_0_REGS + PRU_INTC_ENABLESET0) = 0x1008;
iram = SOC_PRUCORE_0_IRAM;
for(i=0; i<PRULENGTH; i++)
iram[i] = pru0_code[i];
HWREG(SOC_PRUCORE_0_REGS) = 3; // enable PRU0
The code that loads (and runs) on the PRU is this:
* * Simple test of INTC and timer 0 interrupt * will eventually use with SPI to collect data * .global main .text main: ldi r1, 0x4024 ; pointer to STATIDXCLR ldi r2, 3 ; timer interrupt index ldi r3, 30 ; bit to test in r31 ldi r4.w2, 0x01c2 ; high address of timer 0 ldi r4.w0, 0x0044 ; low address of timer 0 INTCTLSTAT ldi r5, 2 ; value to write to INTCTLSTAT start: qbbc start, r31, r3 ; is bit 30 set in r31? sbbo &r1, r2, 0, 4 ; write 3 to STATIDXCLR sbbo &r4, r5, 0, 4 ; write 2 to INTCTLSTAT xor r30.b3, r30.b3, 4 ; toggle GPIO 6-8 jmp start ; and wait for next timer interrupt .end
When I halt the processors I can clear the interrupt by writing directly to INTCTLSTAT, but the PRU does not seem to execute this. What am I doing wrong? Mike
Edit addition:
When I write 0xffffffff to location 0x1c34200 (STATSETINT0) I see 0xffffffff result (all interrupts set). When I then write 0xffffffff to location 0x1c34280 (STATCLRINT0) location 0x1c34200 goes to 0xff7fffff instead of 0x00000000. Is there something wrong with the PRU, or is this a good clue to some other register not being set properly???
