Linux/AM5728: CPTS errors with DPLL_VIDEO1 clock source

David Cemin

Part Number: AM5728

Tool/software: Linux

I am trying to change the clock source from the CPTS from its default (L3_ICLK) to VIDEO1_CLK. To do that, I've modified the content of the CLKSEL_RFT bits from 0x4 to 0x0 (I wrote 0x2 to the address 0x4a0093d0) according to the Table 3-1078. CM_GMAC_GMAC_CLKCTRL.

After I do this, my ptp application stops working and i start seeing the messages below.

# [ 729.836285] cpts: unable to obtain a time stamp

I can only infer that my video1 clk is not fully functional. To verify my video1 clock, I've configured it according to the thread below and exported it to a pin (clkout3) and im measuring on a scope.

https://e2e.ti.com/support/arm/sitara_arm/f/791/p/572806/2124447#pi316653filter=all&pi316653scroll=false&pi316653=1

so i can see that video1 clk is actually working but when I select it as source for CPTS, i see errors that are telling me otherwise.

Questions:

Is there any other register that i should be configuring in order to select video1 as clock for cpts ?
is there a way to verify the status of the video1 clock by reading any registers ?
According to the link above, the status register is unaccessible.
" When the VIDEO1 PLL is enabled (CTRL_CORE_DSS_PLL_CONTROL[PLL_VIDEO1_DSS_CONTROL_DISABLE] = 0), then reading any of the DPLL_VIDEO1_L4_CFG registers (address 0x4A0A4000 – 0x4A0A4020) returns 0x0. "
When i read the register 0x4a0a4004 I get 0x0. When I read the register 0x58004304, it hangs. Is this expected ?

This is on Linux SDK 03.02.00; AM572x EVM

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

What does a readback of CM_GMAC_GMAC_CLKCTRL (0x4A0093D0) show?

0 David Cemin over 8 years ago in reply to Biser Gatchev-XID

Intellectual 400 points

# devmem2 0x4a0093D0
/dev/mem opened.
Memory mapped at address 0xb6ff7000.
Value at address 0x4A0093D0 (0xb6ff73d0): 0x2

0 David Cemin over 8 years ago in reply to David Cemin

Intellectual 400 points

It would be really good if someone could answer to the 3 questions I've asked above. Im not sure if im doing everything that is required to enable this clock source on the cpts. Also, it would be really helpful if i could read the status of this pll somehow

thank you

regards

David

0 Biser Gatchev-XID over 8 years ago in reply to David Cemin

TI__Guru**** 393215 points

I have asked the factory team to look at this. They will respond here.

0 David Cemin over 8 years ago in reply to Biser Gatchev-XID

Intellectual 400 points

Hi,

Its been a week, do we have any follow up on this?

thank you

regards,

David

0 Biser Gatchev-XID over 8 years ago in reply to David Cemin

TI__Guru**** 393215 points

Sorry about the delay. I have escalated the request.

0 David Cemin over 8 years ago in reply to Biser Gatchev-XID

Intellectual 400 points

its been 2 weeks. Do you have any feedback on this ?

thank you

regards

David

0 Schuyler Patton over 8 years ago in reply to David Cemin

TI__Mastermind 40750 points

Can you describe what the video1 clock provides your application that the default clock for CPTS does not?

Unfortunately the current kernel from the TI sdk does not support switching the CPTS reference clock from the default.

The reason regsiter accesses fail and the application is failing is because the Video 1 PLL is not available at the CPTS clock mux. Upstream from the mux you have modified is at least one mux not switching the video 1 clock to the tree that supports the CPTS module.

Where are you modifying the clock mux now?

0 David Cemin over 8 years ago in reply to Schuyler Patton

Intellectual 400 points

Hi,

thank you for you answer. I have answered your questions below and have some additional follow up questions as well.

regards,

David

> Can you describe what the video1 clock provides your application that the default clock for CPTS does not?
I need to have an external PLL on the same clock domain as CPTS. Since the default CPTL clock is not available to be put on an output (i.e. clkout3), I chose one of the clocks that are available on the output and can drive CPTS at the same time.

> Unfortunately the current kernel from the TI sdk does not support switching the CPTS reference clock from the default.
Do I have access to any kernel that supports that ? if not, what is the required support that needs to be implemented to have the support for switching the default clock for cpts ?

> Where are you modifing the clock mux now ?
I've modified the content of the CLKSEL_RFT bits from 0x4 to 0x0 (I wrote 0x2 to the address 0x4a0093d0) according to the Table 3-1078. CM_GMAC_GMAC_CLKCTRL.

0 Schuyler Patton over 8 years ago in reply to David Cemin

TI__Mastermind 40750 points

At the moment there is only one TI kernel and it unfortunately does not support what you want do. Adding this feature is a roadmap item but does not have a time frame at the moment.

0 David Cemin over 8 years ago in reply to Schuyler Patton

Intellectual 400 points

sounds good. But i would like to understand if that is a limitation on the linux kernel only. If that is true i will most likely implement it myself.

So, would you be able to point me out where is that code current implemented in the linux kernel so i can get started ? After that, this thread can be closed.

Thank you.

regards

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Linux/AM5728: CPTS errors with DPLL_VIDEO1 clock source