AM3505/17 maximum rise/fall time for SYS_nRESPWRON

Ken Turocy

Other Parts Discussed in Thread: TPS65023, AM3505

The TI wiki site for the AM35x with TPS65023 Design-In Guide says the following: "The AM35xx data manual states that the maximum rise/fall time for SYS_nRESPWRON is 10ns" . I can not find that statement in the AM3505/17 data sheet or the technical reference manual. Can you please verify that this maximum rise/fall time is required for the AM3505/17 device's SYS_nRESPWRON pin? I don't see this requirement being met on the Logic PD evaluation board for the AM3505/17.

Thanks,

Ken

over 15 years ago

0 kshin over 15 years ago

TI__Genius 16690 points

Hi Ken,

This description was carried over from wiki for OMAP35x. In OMAP35x, standard CMOS IO has 10 ns rise/fall time requirement. However an exception that relaxes the requirement to 33.3 ns is added to sys_nrespwron pad in later version of data manual. Since a different IO cell to support 1.8/3.3 V dual voltage is used in AM35x, let me confirm this requirement for AM35x and get back to you.

Regards,

Kazunobu Shin

0 Takeshi Yuasa over 13 years ago in reply to kshin

Expert 1230 points

Hi Kazunobu Shin,

So what is the exact value of this specification for AM35x? Recent WIKI does not describe the any concrete value but says like ASAP to avoid the noise.

Regards,
Takeshi

0 kshin over 13 years ago in reply to Takeshi Yuasa

TI__Genius 16690 points

Hello

The rise time requirement described in the wiki has been removed after reviewing implementation in AM35x. Therefore there is no tight rise time requirement on SYS_nRESPWRON signal, but it is better to have as less a rise time as possible to avoid any noise coupling, glitches on this line.

http://processors.wiki.ti.com/index.php/AM35x_with_TPS65023:_Design_In_Guide#SYS_nRESPWRON_rise_time

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AM3505/17 maximum rise/fall time for SYS_nRESPWRON