Part Number: AM3359
Hi,
I have a question about NOR Flash Writer which are included in ISDK v1.
In "norflash.c", there are following code which are accessing to NOR Flash.
*************************************************************
/* Walk through each sector, erase any sectors within range */
/* Start sector erase sequence */
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0xAA;
*(volatile UINT16 *)(FLASH_BASE + (0x2AA <<1) ) = 0x55 ;
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0x80;
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0xAA;
*(volatile UINT16 *)(FLASH_BASE + (0x2AA <<1) ) = 0x55 ;
*************************************************************
It's shifting the address 1 bit(example : 0x555 << 1).
Do you know why it is shifiting the address?
We want to know the reason.
I will attach the "norflash.c".
best regards,
g.f.
/*
* Copyright (c) 2012 Texas Instruments Incorporated ALL RIGHTS RESERVED
*
*/
/**
* @Component: NOR flash driver.
*
* @Filename: norFlash.c
*
============================================================================ */
#include <stdio.h>
#include "hw_types.h"
#include "norFlash.h"
#include "hw_gpmc.h"
#include "hw_cm_per.h"
#include "hw_control_polar.h"
#include "delay.h"
#include "gpio.h"
#include "uart.h"
extern UINT8 boardType;
//static UINT32 sectorEnd[FLASH_SECTORS];
void NORDelay
(
UINT32 u32Delay
)
{
volatile UINT32 u32LoopCntr;
for ( u32LoopCntr = 0 ; u32LoopCntr < (u32Delay); u32LoopCntr++ ){ };
}
void NORDelay1
(
UINT32 u32usec
)
{
NORDelay( u32usec * 2 );
}
void SetNORAddrGPIOPin(UINT32 address)
{
UINT16 gpioPinVal = 0;
//*addrVariable = (UINT16)address;
gpioPinVal = (UINT16)(address >> 20);
GPIOEnableDisableOut(2,26, gpioPinVal & 0x01);
GPIOEnableDisableOut(2,27,(gpioPinVal >> 1) & 0x01);
GPIOEnableDisableOut(2,28,(gpioPinVal >> 2) & 0x01);
GPIOEnableDisableOut(2,29,(gpioPinVal >> 3) & 0x01);
}
void SetNORAddrGPIOPinForICE2(UINT32 address)
{
UINT16 gpioPinVal = 0;
gpioPinVal = 3& (((UINT16)(address >> 19)));
//printf("Change NOR sector to %i\n", gpioPinVal);
GPIOEnableDisableOut(2,12, gpioPinVal & 0x01);
GPIOEnableDisableOut(2,13,(gpioPinVal >> 1) & 0x01);
}
void ResetSetNORAddrGPIOPin()
{
GPIOEnableDisableOut(2,26,0);
GPIOEnableDisableOut(2,27,0);
GPIOEnableDisableOut(2,28,0);
GPIOEnableDisableOut(2,29,0);
}
void ResetSetNORAddrGPIOPinICE2()
{
SetNORAddrGPIOPinForICE2(0);
}
/** **************************************************************************
* gpmcPinMuxConf
*
* This routine configure GPMC pin multiplexer.
*
* Return
* return SUCCESS
*
*
***************************************************************************/
INT16 GPMCPinMuxConfNor()
{
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(0)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_RXACTIVE |
CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(1)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_RXACTIVE |
CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(2)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_RXACTIVE |
CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(3)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_RXACTIVE |
CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(4)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_RXACTIVE |
CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(5)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_RXACTIVE |
CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(6)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_RXACTIVE |
CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(7)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_RXACTIVE |
CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(8)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_RXACTIVE |
CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(9)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_RXACTIVE |
CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(10)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_RXACTIVE |
CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(11)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_RXACTIVE |
CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(12)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_RXACTIVE |
CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(13)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_RXACTIVE |
CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(14)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_RXACTIVE |
CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_AD(15)) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_RXACTIVE |
CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_PUDEN;
if(boardType == AM335X_BOARD_TYPE_ICE_V2)
{
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_LCD_VSYNC) = //A16
PINMUXMODE_3 |
CONTROL_CONF_LCD_VSYNC_CONF_LCD_VSYNC_RXACTIVE |
CONTROL_CONF_LCD_VSYNC_CONF_LCD_VSYNC_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_LCD_HSYNC) = //A17
PINMUXMODE_3 |
CONTROL_CONF_LCD_HSYNC_CONF_LCD_HSYNC_RXACTIVE |
CONTROL_CONF_LCD_HSYNC_CONF_LCD_HSYNC_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_LCD_DATA(6)) = //A18
PINMUXMODE_8 |
CONTROL_CONF_LCD_DATA6_CONF_LCD_DATA6_RXACTIVE |
CONTROL_CONF_LCD_DATA6_CONF_LCD_DATA6_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_LCD_DATA(7)) = //A19
PINMUXMODE_8 |
CONTROL_CONF_LCD_DATA7_CONF_LCD_DATA7_RXACTIVE |
CONTROL_CONF_LCD_DATA7_CONF_LCD_DATA7_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_MII1_RXDV) = //GPIO3_4 to disable SYSBOOT buffers
PINMUXMODE_8 |
CONTROL_CONF_LCD_DATA7_CONF_LCD_DATA7_RXACTIVE |
CONTROL_CONF_LCD_DATA7_CONF_LCD_DATA7_PUDEN;
}
else
{
//MUXed mode - access higer address using GPIO .
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_MMC0_DAT3) =
PINMUXMODE_8 |
CONTROL_CONF_MMC0_DAT3_CONF_MMC0_DAT3_RXACTIVE |
CONTROL_CONF_MMC0_DAT3_CONF_MMC0_DAT3_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_MMC0_DAT2) =
PINMUXMODE_8 |
CONTROL_CONF_MMC0_DAT2_CONF_MMC0_DAT2_RXACTIVE |
CONTROL_CONF_MMC0_DAT2_CONF_MMC0_DAT2_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_MMC0_DAT1) =
PINMUXMODE_8 |
CONTROL_CONF_MMC0_DAT1_CONF_MMC0_DAT1_RXACTIVE |
CONTROL_CONF_MMC0_DAT1_CONF_MMC0_DAT1_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_MMC0_DAT0) =
PINMUXMODE_8 |
CONTROL_CONF_MMC0_DAT0_CONF_MMC0_DAT0_RXACTIVE |
CONTROL_CONF_MMC0_DAT0_CONF_MMC0_DAT0_PUDEN;
}
/* control pins */
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_WEN ) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_RXACTIVE |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_CSN(0) ) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_RXACTIVE |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_PUDEN;
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_OEN_REN) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_RXACTIVE |
CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_PUDEN;
if(boardType == AM335X_BOARD_TYPE_ICE)
{
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_WAIT0) =
PINMUXMODE_1 |
CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_RXACTIVE &
~CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_PUDEN &
~CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_SLEWCTRL;
}
HWREG(CTRL_MODULE_BASE_ADDR + CONTROL_CONF_GPMC_ADVN_ALE ) =
( PINMUXMODE_1 |
CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_RXACTIVE |
CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_PUDEN );
return SUCCESS;
}
/****************************************************************************
* NORInit
*
* This routine initializes the NOR flash by configuring GPMC.
*
* Param
* None
*
* Return
* return SUCCESS for success
* return FAIL for error
*
*/
INT16 NORInit(void)
{
UINT16 csNum = 0;
UINT32 temp = 0;
NORDelay(100000);
/* Initialize the GPIO driver */
// GPIOInitialization(SA_PORT2);
NORDelay(100000);
//enable clock to GPMC module
HWREG(PRCM_BASE_ADDR + CM_PER_GPMC_CLKCTRL ) |=
CM_PER_GPMC_CLKCTRL_MODULEMODE_ENABLE;
//check to see if enabled
while( (HWREG(PRCM_BASE_ADDR + CM_PER_GPMC_CLKCTRL) & CM_PER_GPMC_CLKCTRL_IDLEST) !=
(CM_PER_GPMC_CLKCTRL_IDLEST_FUNC << CM_PER_GPMC_CLKCTRL_IDLEST_SHIFT));
//reset the GPMC module
HWREG(GPMC_BASE + GPMC_SYSCONFIG ) |= GPMC_SYSCONFIG_SOFTRESET;
while((HWREG(GPMC_BASE + GPMC_SYSSTATUS) & GPMC_SYSSTATUS_RESETDONE) ==
GPMC_SYSSTATUS_RESETDONE_RSTONGOING);
//Configure to no idle
temp = HWREG(GPMC_BASE + GPMC_SYSCONFIG);
temp &= ~GPMC_SYSCONFIG_IDLEMODE;
temp |= GPMC_SYSCONFIG_IDLEMODE_NOIDLE << GPMC_SYSCONFIG_IDLEMODE_SHIFT;
HWREG(GPMC_BASE + GPMC_SYSCONFIG) = temp;
HWREG(GPMC_BASE + GPMC_IRQENABLE) = 0x0;
HWREG(GPMC_BASE + GPMC_TIMEOUT_CONTROL) = 0x0;
//configure for NOR and granularity x2
HWREG(GPMC_BASE + GPMC_CONFIG1(csNum)) = (0x0 |
//(GPMC_CONFIG1_0_DEVICESIZE_EIGHTBITS <<
(GPMC_CONFIG1_0_DEVICESIZE_SIXTEENBITS <<
GPMC_CONFIG1_0_DEVICESIZE_SHIFT ) |
(GPMC_CONFIG1_ATTACHEDDEVICEPAGELENGTH_FOUR <<
GPMC_CONFIG1_ATTACHEDDEVICEPAGELENGTH_SHIFT ) |
(0x2 << 8 ) //Address/Data Multiplex enable
);
HWREG(GPMC_BASE + GPMC_CONFIG2(csNum)) = (0x0 |
(CS_ON_TIME ) |
(CS_DEASSERT_RD << GPMC_CONFIG2_0_CSRDOFFTIME_SHIFT) |
(CS_DEASSERT_WR << GPMC_CONFIG2_0_CSWROFFTIME_SHIFT));
HWREG(GPMC_BASE + GPMC_CONFIG3(csNum)) = (0x0 |
(ADV_ASSERT << GPMC_CONFIG3_0_ADVONTIME_SHIFT) |
(ADV_DEASSERT_RD << GPMC_CONFIG3_0_ADVRDOFFTIME_SHIFT) |
(ADV_DEASSERT_WR << GPMC_CONFIG3_0_ADVWROFFTIME_SHIFT));
HWREG(GPMC_BASE + GPMC_CONFIG4(csNum)) = (0x0 |
(OE_ASSERT << GPMC_CONFIG4_0_OEONTIME_SHIFT) |
(OE_DEASSERT << GPMC_CONFIG4_0_OEOFFTIME_SHIFT) |
(WE_ASSERT << GPMC_CONFIG4_0_WEONTIME_SHIFT)|
(WE_DEASSERT << GPMC_CONFIG4_0_WEOFFTIME_SHIFT));
HWREG(GPMC_BASE + GPMC_CONFIG5(csNum)) = (0x0 |
(CFG_5_RD_CYCLE_TIM << GPMC_CONFIG5_0_RDCYCLETIME_SHIFT)|
(CFG_5_WR_CYCLE_TIM << GPMC_CONFIG5_0_WRCYCLETIME_SHIFT)|
(CFG_5_RD_ACCESS_TIM << GPMC_CONFIG5_0_RDACCESSTIME_SHIFT)
);
HWREG(GPMC_BASE + GPMC_CONFIG6(csNum)) = (0x0 |
(GPMC_CONFIG6_0_CYCLE2CYCLESAMECSEN_C2CDELAY <<
GPMC_CONFIG6_0_CYCLE2CYCLESAMECSEN_SHIFT) |
(CYC2CYC_DELAY << GPMC_CONFIG6_0_CYCLE2CYCLEDELAY_SHIFT) |
(WR_DATA_ON_ADMUX << GPMC_CONFIG6_0_WRDATAONADMUXBUS_SHIFT)|
(CFG_6_WR_ACCESS_TIM << GPMC_CONFIG6_0_WRACCESSTIME_SHIFT));
HWREG(GPMC_BASE + GPMC_CONFIG7(0)) =
(CFG_7_BASE_ADDR << GPMC_CONFIG7_0_BASEADDRESS_SHIFT) |
(0x1 << GPMC_CONFIG7_0_CSVALID_SHIFT) |
(CFG_7_MASK << GPMC_CONFIG7_0_MASKADDRESS_SHIFT);
#if 0
if(boardType == AM335X_BOARD_TYPE_ICE)
{
/* Populate sector table */
for (i = 0; i < FLASH_SECTORS; i++)
{
sectorEnd[i] = FLASH_BASE +(((i + 1) * FLASH_SECTORSIZE) - 1);
}
}
#endif
NORDelay(200000);
#if 0
status = GPIOSetOutputPin(SA_PORT2, SA_PORT2_PIN25);
if(SUCCESS != status)
{
UARTDebugSendString("\n\n\t\t GPIO INITIALIZED FAILED");
return (status);
}
status = GPIOEnableDisableOut(SA_PORT2, SA_PORT2_PIN25, 0);
if(SUCCESS != status)
{
return (status);
}
NORDelay(2000);
status = GPIOEnableDisableOut(SA_PORT2, SA_PORT2_PIN25, 1);
if(SUCCESS != status)
{
return (status);
}
#endif
//NORDelay(200000);
NORDelay(2000);
return SUCCESS;
}
/** **************************************************************************
* norFlashGetId
*
* This routine will get the NOR device's manufacture ID and device IDs
*
* Param id [IN] Buffer pionter to copy IDs.
*
* Return
* return SUCCESS
*
*/
INT16 NORFlashGetId( UINT16* id)
{
volatile UINT16* pmfgid = ( UINT16* )FLASH_BASE;
NORDelay(20000);
//printf("Error Type1 : %X \n", HWREG(GPMC_BASE + GPMC_ERR_TYPE) );
HWREGB(FLASH_BASE + (0x555 << 1 ) ) = 0xAA;
HWREGB(FLASH_BASE + (0x2AA << 1 ) ) = 0x55;
HWREGB(FLASH_BASE + (0x555 << 1 ) ) = 0x90;
/* Insert small delay for device to respond */
*id++ = *pmfgid; // Read MFG_ID
NORDelay(10);
*id++ = *(pmfgid + 0x01); // Read DEV_ID1
NORDelay(10);
*id++ = * ( volatile UINT16* ) ( ( (unsigned long) pmfgid ) + (0x08002 << 1)); // Read DEV_ID2
NORDelay(10);
*((UINT8 *)FLASH_BASE) = FLASH_RESET;
NORDelay(20000);
return SUCCESS;
}
/** **************************************************************************
* norFlashErase
* This routine will erase the NOR flash sectors.
*
* Param sectorAddr [IN] Starting address of the sector to be erased.
* length [IN] Size to be erased.
*
*
*
* Return
* return SUCCESS for success
*
*/
INT16 NORFlashErase( UINT32 sectorAddr, UINT32 length )
{
volatile UINT16 *pData;
volatile int i=0;
UARTPrint1("Erasing sectorBase: ", sectorAddr);
if(boardType == AM335X_BOARD_TYPE_ICE)
{
//NOR_ACCESS_USING_GPIO
SetNORAddrGPIOPin(sectorAddr);
}
else if(boardType == AM335X_BOARD_TYPE_ICE_V2)
{
SetNORAddrGPIOPinForICE2(sectorAddr);
}
/* Walk through each sector, erase any sectors within range */
/* Start sector erase sequence */
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0xAA;
*(volatile UINT16 *)(FLASH_BASE + (0x2AA <<1) ) = 0x55 ;
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0x80;
*(volatile UINT16 *)(FLASH_BASE + (0x555 <<1) ) = 0xAA;
*(volatile UINT16 *)(FLASH_BASE + (0x2AA <<1) ) = 0x55 ;
/* Start erase at sector address */
pData = (UINT16 *)sectorAddr;
*pData = FLASH_ERASE_SECTOR;
/* Wait for erase to complete */
while(1)
if(*pData & NOR_ERASE_COMPLETE)
break;
printf("Erasing sectorBase %x \n", sectorAddr);
/* Put back in read mode */
*((volatile UINT16 *)FLASH_BASE) = FLASH_RESET;
for(i=0; i<100; i++)
DELAYMicroSeconds(10000);
return SUCCESS;
}
/** **************************************************************************
* norFlashRead
* This routine will read length bytes from the specified address of the flash
*
* Param src [IN] Starting address of the flash.
* dst [IN] Read data buffer
* length [IN] Total number of words to be read
*
* Return
* return SUCCESS for success
*
*/
INT16 NORFlashRead( UINT16* dst1, UINT16* src1, UINT32 length )
{
UINT32 i;
UINT16* psrc16 = ( UINT16* )src1;
UINT16* pdst16 = ( UINT16* )dst1;
UARTPrint1("Reading the Flash values", 0);
/*
* Read Data to Buffer
*/
for ( i = 0 ; i < length ; i ++ )
{
*pdst16++ = *psrc16++;
}
return SUCCESS;
}
/** **************************************************************************
* norFlashWrite
* This routine will write length bytes from the source buffer
* to the specified address of the flash
*
* Param src [IN] Buffer to be written
* dst [IN] Starting address of the flash where data to be
* written
* length [IN] Total number of words to be written
*
* Return
* return SUCCESS for success
*/
INT16 NORFlashWrite( UINT16* src1, UINT16* dst1, UINT32 length )
{
UINT32 i;
volatile UINT16* psrc16 = ( UINT16* )src1;
volatile UINT16* pdst16 = ( UINT16* )dst1;
volatile UINT32 address = FLASH_BASE;
UARTPrint1("Writing the Flash", 0);
//printf("Writing to NOR Flash @ %x",dst1);
if(boardType == AM335X_BOARD_TYPE_ICE)
{
//NOR_ACCESS_USING_GPIO
SetNORAddrGPIOPin((UINT32)pdst16);
}
else if(boardType == AM335X_BOARD_TYPE_ICE_V2)
{
SetNORAddrGPIOPinForICE2((UINT32)pdst16);
}
for ( i = 0 ; i < length ; i ++ )
{
*(UINT16*) (address + (0x555<<1) ) = 0xAA;
*(UINT16*) (address + (0x2AA<<1) ) = 0x55;
*(UINT16*) (address + (0x555<<1) ) = 0xA0;
*pdst16 = *psrc16;
/* Wait for programming to complete */
while(1)
if((*pdst16 & 0x80) != (*psrc16 & 0x80))
break;
*((UINT16 *)FLASH_BASE) = FLASH_RESET;
DELAYMicroSeconds(200);
if( ( (i%1024) == 0) & (i != 0) )
UARTPrint("Flash Programming at %X and X 2KB", (UINT32) pdst16, i/1024, i, 0);
pdst16++;
psrc16++;
}
*((UINT16 *)FLASH_BASE) = FLASH_RESET;
UARTPrint1("Writing the Flash is completed", 0);
//printf("Writing the Flash is completed ");
return SUCCESS;
}
