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AM5728: Difference between cold and warm SW reset

user4759774
Intellectual 745 points
Part Number: AM5728


Dear All,

I was trying to understand the difference between COLD and WARM reset in AM57xx SoC:

SPRUHZ6G [1] - page 1229

PRM_RSTCTRL 0x4AE0 7D00

"Cold" SW reset for AM57xx in bootloader

RST_GLOBAL_COLD_SW - 0x2

I know that with WARM SW reset some bits preserve their values, but I would like to know some more details.

And I wanted to find corresponding diagram for how reset signals (!RSTOUT, PORZ) behave during global COLD SW reset.

Unfortunately, in [1] - I've only found some diagram for WARM reset:

[1] - page 501 "Global Warm Reset Sequence"

Is there any detailed description of COLD SW reset? Is there any explanation with key differences between COLD and WARM SW reset?

Some signal diagrams?

Best regards,

Łukasz 

  • 0
    TI__Guru**** 393215 points
    Hi,

    Please read Errata i862.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 745 points
    Hi Biser,

    This is indeed a very interesting errata.

    However, it does not clear things about the COLD and WARM resets (the signal diagrams, if the pointed out WARM SW reset diagram can be applied to COLD SW reset).

    Could you shed some more light on the RESET AM57xx internals?

    Thanks in advance,
    Łukasz
  • 0 in reply to user4759774
    TI__Mastermind 26215 points
    Lukasz, there are more details on TRM section 3.5.2.2, below is just part of the details...

    3.5.2.2 Occurrence
    A reset signal can be categorized depending on when the reset occurs:
    • Cold reset: Occurs on device power up (POR), or in certain emulation modes. Also, it can be softwareinitiated.
    Upon cold reset, it is assumed the device is being powered up, and therefore, everything in
    the device is being reset. That is, cold resets must be considered as global resets.
    • Warm reset: Warm reset types are not necessarily applied globally within device. Also, a module can
    use a warm reset to reset a subset of its logic. This is often done to speed up reset recovery time; that
    is, the time to transition to a safe operating state, compared to the time required upon receipt of a cold
    reset. Warm reset events include software-triggered reset per power domain, watchdog time-out,
    externally triggered and emulation initiated.
    Modules that behave differently in cold reset and warm reset have two reset signals: RST and
    PWRON_RST. These reset signals reconstruct warm reset and cold reset in modules that require them.
    The following modules are reset upon global cold reset events and not upon global warm reset events:
    • All DPLLs associated with the PRCM module
    • EMIF
    • Control module: CTRL_MODULE_CORE, CTRL_MODULE_WKUP