Tying with DVO2 & HDMI

Hi Rajesh,

Can you please tell your display controller tree? 

It is failing while opening display path. This will fail if it is not connected or venc to which it is connected is not on. 

Rgds,

Brijesh

Hi Brijesh,

Thanks for your reply..,

From usecase :- MIPI-Interface ---> scaler ---> display (DVO2 + HDMI)

Here I have created only DVO2 display device !!! Is it necessary to create HDMI display ???

Because In file :- ipnc_mcfw/demos/mcfw_api_demos/multich_usecase/ti_mcfw_ipnc_main.c,  I supposed to call this Init is it ON/OFF ???

Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDMI, &vdisParams);

By default display device is configured as LCD

gUI_mcfw_config.display_device = LCD;

In file mcfw\src_bios6\links_m3vpss\system\system_dctrl.c  whatever you suggested I followed the same !!!

Kindly suggest me to solve this ???

Regards,

Rajesh Kannan.S

Hi Rajesh,

If you are running two vencs in tied mode, you have to enable both the display devices.
If you have only one device enabled and your display path is connected to both the device, this will also create display create failure.
So
1, enable tying both DVO2, HDMI
2, enable both the devices
3, connect BP0/1 path to both the vencs.

This should work.

Rgds,
Brijesh

Hi Brijesh,

Thanks for your reply..,

1.Enabled both DVO2 & HDMI in usecase file.

2.Enabled both the devices (DVO2 & HDMI by giving value is 3 ) is it correct ?

gUI_mcfw_config.display_device = LCD; for Ex: LCD - 0..,  HDMI -1..,  LCD+HDMI - 3

3. In usecase connect BP0/1 path to both the vencs.

displayPrm.displayId  = DISPLAY_LINK_DISPLAY_BP0;  For DVO2

displayPrm_HDMI.displayId  = DISPLAY_LINK_DISPLAY_BP1; For HDMI

I did the above mentioned the changes. I'll test it and let you know shortly.

Regards,

Rajesh Kannan.S

Hi Brijesh,

After the changes below the logs I got it !!! I missed somewhere else ???

[m3vpss ] 13582: DISPLAY: Create in progress !!!
[m3vpss ] PrevLinkQueId(0) NumQue(1)
[m3vpss ] width is 800 and height is 480 : dataFormat 1
[m3vpss ] pitch 0 is 1600 : pitch 1 is 0 : pitch 2 is 0
[m3vpss ] DisplayId = 2,DataFormat = 1
[m3vpss ] DISPLAY_LINK_DISPLAY_BP0 : DisplayLink_drvDisplayCreate 932
[m3vpss ]
[m3vpss ] BP0 displayInstId = 0
[m3vpss ] 13584: RAJESHKANNAN DISPLAY: 0: Window size 800x480, 1600B
[m3vpss ] DisplayLink_drvDisplayCreate 1058, displayHndl is null
[m3vpss ] 13584: Assertion @ Line: 1060 in links_m3vpss/display/displayLink_drv.c: pObj->displayHndl != NULL : failed !!!
ApproDrvInit: 7

Kindly suggest me to solve this issue !!!

Regards,
Rajesh Kannan.S

Hi Brijesh,

Any input ? Whatever I tried is it correct ???

Regards,

Rajesh Kannan.S

Hi Rajesh,

Do you see any error on the ccs?
Can you please go bit inside and see why it is failing?
If your path is connected and vencs are enabled, it should work.

Rgds,
Brijesh

Hi,

Thanks for your reply..,

While calling this function Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDMI, &vdisParams); is entered to 8107 build
#if defined (TI_8107_BUILD)
pContext->tiedDevicesMask = VDIS_VENC_DVO2 | VDIS_VENC_HDMI;
pContext->deviceParams[VDIS_DEV_DVO2].resolution = pContext->deviceParams[VDIS_DEV_HDMI].resolution;
pContext->deviceParams[VDIS_VENC_HDMI].resolution = pContext->deviceParams[VDIS_DEV_HDMI].resolution;

Is it enough to tie up with DVO2 and HDMI ??

While creating display itself getting failed !!!

Kindly suggest !!!

Regards,
Rajesh Kannan.S

Yes, it looks correct.
I am asking to go inside Fvid2_Create function and see where it fails?

Rgds,
Brijesh

Hi Brijesh ,

Based on display device I'm calling this configuration for HdmiDvo2

/* Display Controller tree Configuration */

/* To tie DVO2 and HDCOMP together refer following Mesh */
Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmiDvo2 = {
VPS_DC_USERSETTINGS, /* Use Case */
/* Edge information */
{
{VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX} ,
{VPS_DC_VCOMP_MUX, VPS_DC_VCOMP} ,
{VPS_DC_CIG_CONSTRAINED_OUTPUT, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX} ,
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDMI_BLEND} ,
{VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX} ,
{VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND} ,
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND}
}
,
12,
/* VENC information */
{
/* Mode information */
{
{VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}
}
, /* 1080p30 is mode
* is overwritten
* later inside
* System_displayCtrlInit
*/
{VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60}
}
, /* 1080p30 is mode
* is overwritten
* later inside
* System_displayCtrlInit
*/
{VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}
}
, /* 1080p30 is mode
* is overwritten
* later inside
* System_displayCtrlInit
*/
{VPS_DC_VENC_SD, {FVID2_STD_NTSC}
}
}
,
(VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDMI), /* Tied VENC bit
* mask */
4u /* Number of VENCs
*/
}
};

Regards,
Rajesh Kannan.S

Hi Rajesh,

Please check which input path you are trying to open.
From this display controller tree, BP0 path is connected to HDCOMP and BP1 is connected to DVO2 and HDMI.
If you are trying to open BP0 path, it will fails since i guess HDCOMP is not enabled.

Regards,
Brijesh

Hi Brijesh,

Thanks for your reply.,
In file ipnc_mcfw/demos/mcfw_api_demos/multich_usecase/ti_mcfw_ipnc_main.c
Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDMI, &vdisParams); I have called this function to enable VencInit (DVO2 & HDMI)

I did n't call to enable HDCOMP. If I want to enable this also to call
Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDCOMP, &vdisParams); is it correct ??

From Venc_Init , It will take two init for Venc For HDCOMP as well as HDMI ???
I'll try and let you know the results !!!

Thanks Brijesh.

Regards,
Rajesh Kannan.S

Hi Rajesh,

i think so, but can you please also see if you are trying to open BP0?

Rgds,
Brijesh

Hi Brijesh,

Thanks for your reply.

For DVO2 and HDMI display controller tree is working properly in a separate usecase.

HDMI & DVO2 display controller tree is getting failed !!!

I called twice to set VencInit for HDCOMP & HDMI and DVO2 & HDMI
Vdis_tiedVencInit(VDIS_DEV_HDMI, VDIS_DEV_HDCOMP, &vdisParams);
Vdis_tiedVencInit(VDIS_DEV_DVO2, VDIS_DEV_HDMI, &vdisParams);

In function implementation I have mentioned that
pContext->tiedDevicesMask = VDIS_VENC_DVO2 | VDIS_VENC_HDMI;
In this.., HDCOMP is net setting the tiedDeviceMask.

I need to change the display controller tree I guess ???

HDMI-DVO2 :-
{
{VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX} ,
{VPS_DC_VCOMP_MUX, VPS_DC_VCOMP} ,
{VPS_DC_CIG_CONSTRAINED_OUTPUT, VPS_DC_HDCOMP_BLEND} ,

{VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX} ,
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDMI_BLEND} ,
{VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX} ,
{VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND} ,

{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND}
}

DVO2 :-
{
{VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX},
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT},
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},

{VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},
{VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND},

/* SC1 -> SD */
{VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX},

/* Graphics connection */
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND},
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDCOMP_BLEND},
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_DVO2_BLEND},
{VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},
{VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
{VPS_DC_BP0_INPUT_PATH, VPS_DC_HDCOMP_MUX },
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT},
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},

HDMI :-

{VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX},
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT},
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},

{VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},
{VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND},

/* SC1 -> SD */
{VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX},

/* Graphics connection */
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND},
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDCOMP_BLEND},
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_DVO2_BLEND},
{VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},

/* Main input path */
{VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},

{VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},
{VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
{VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},

Kindly guide me to solve this issue !!!

Regards,
Rajesh Kannan.S

Hi Brijesh,

Any changes or input ???

Regards,
Rajesh Kannan.S

Hi Brijesh,

Still the problem exists from my side !!!

Whether it could be a problem with Display controller tree I guess !!!

In my usecase, its common for both (DVO2 & HDMI) display  ID is : DISPLAY_LINK_DISPLAY_SC2 (Auxiliary Display path) 

As you said  :- From this display controller tree, BP0 path is connected to HDCOMP and BP1 is connected to DVO2 and HDMI.

Whether I could try with the Auxiliary path ??? Or for DVO2 display id is DISPLAY_LINK_DISPLAY_BP1  is correct ??? 

It could be a problem with Resolution or Display path mentioned in the display controller !!!

Kindly suggest me to solve this issue !!!

Regards,

Rajesh Kannan.S

Hi TI,

Anyone from TI IPNC team can respond to our queries ??

Regards,

Rajesh Kannan S

Hi TI,

Still the problem exists in our side !!!

Could you suggest me to solve this issue ?

Regards,

Rajesh Kannan.S

1、I encountered the same problem，I can output HDMI or PAL alone；When I bind HDMI and DVO2 together, there have same problem！
links_m3vpss/display/displayLink_drv.c: pObj->displayHndl != NULL : failed !!!
WHY?
2、Can DM385 output via DVO2 (VOUT0)? Do not bind HDMI or HDCOMP，What do I need to change

Hi,

You could check this doc under ti_tools/hdvpss_01_00_01_37/docs/HDVPSS_UserGuide.pdf for DisplayDriver.

Based on the Display Controller Macro Mapping u have to change the file in system_dctrl.c

Regards,

Rajesh Kannan.S