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DRA722: DRA744 boot fail issue

Gary Chien
Prodigy 10 points

Part Number: DRA722

Hi,


We have a platform use DRA722 chip and meet some problem on the boot stage. System load boot code and running, but that fail before display any information on the console. We suspect some issue crash at DDR memory. But we try to use CCS to merify DDR, then DDR have pass testing.
The dominating questions as below:
A. Stress test limitation of DDR size. Maximum 1GB. Need expend to 2GB verification.
B. Stress test pass but still bring-up NG. How to do further debug?
Please help provide some suggestion.

  • 0
    TI__Guru 55685 points

    Hi Gary,

    What is the bootloader that you are using and what boot mode are you trying? Are you using TI EVM or custom board?

    Can you provide details on why you suspect DDR as SBL code runs from OCMC.

    Regards,

    Rishabh

  • 0 in reply to Rishabh Garg
    Expert 1005 points
    Hi Rishabh,
    We are using TI J6 custom board + 7.03.00.03 sdk , emmc boot .
    Because those TI J6 board can not boot up successfully ( filtered by our MP line ) , so we turn to use the ddr stress test program to verify those TI J6 board with CCS.
    But we still encounter some issues when using ddr stress test program.
    A. Stress test has limitation of DDR size. Maximum 1GB. Need expend to 2GB verification.
    B. Stress test result is pass but still boot up NG. How to do further debug?
    C. ddr stress test stuck in the beginning


    Best,
    Andy
  • 0 in reply to Andy Huang18
    TI__Guru 55685 points
    Hi Andy,

    TI EVM has only 1.5 GB memory. You need to modify the LISA map configuration to access whole of DDR.
    Also I did not understand how B can co-exist with C.
    Are you facing this issue on multiple samples?

    Regards,
    Rishabh
  • 0 in reply to Rishabh Garg
    Expert 1005 points

    Hi Rishabh,

            Yes ,  we have couple samples encounter the booting issue. 

           And we did modified the LISA map to 2GB address,  the 1GB limitation is coming from  the ddr stress test program  of  AvatarEmifTools .

    Here is the failure booting log ,  there  should be  hardware  issues and we want to find out which hw part is wrong.

    U-Boot SPL 2014.07 (Dec 08 2016 - 15:53:31)
DRA752-GP ES2.0
SDRAM: identified size not same as expected size identified: 0 expected: 40000000

    So we want to know 

    1. How to extend the 1G testing limitation of ddr stress test program

    2.  What else part should check further if ddr stress testing pass but booting still fail ?

    Best,

    Andy

  • 0 in reply to Andy Huang18
    TI__Guru 55685 points

    Hi Andy,

    I am not aware of the package AvatarEmifTools.

    I have contacted the team who owns this. They will help you further

    Regards,

    Rishabh

  • 0 in reply to Andy Huang18
    TI__Mastermind 41290 points

    Hi Andy,

    1) Can you please elaborate on the 1G testing limitation? The test size should be user configurable during runtime of the ddr stress test from AvatarEMIFTools. In the function "DDR_Stress_Test" from <AvatarEmifTools>/tools/ddr_stress_test/ddr_stress_test.c, the variable "size" is set by a "scanf" call, which should allow the user to set the test size.

    2) After u-boot shows "SDRAM: identified size not same as expected size identified", can you connect to the device through JTAG (do not run GELs) and check the contents of the DDR memory space? Are you able to read / write values by manually changing the memory contents through the memory browser window in CCS? Can you also check the EMIF register space and confirm that these values match the expected values?

    Thanks,
    Kevin