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Linux/TCI6636K2H: TCI6638K2K

Part Number: TCI6636K2H
Other Parts Discussed in Thread: TCI6638K2K

Tool/software: Linux

I have a tci6638k2k board, how to use the "mpm services" in the lasted linux sdk?

After update linux sdk from "ti-processor-sdk-linux-k2hk-evm-03.00.00.04-linux" to "ti-processor-sdk-linux-k2hk-evm-03.02.00.05-linux",

mpmsrv will print "Segmentation fault (core dumped)" when i use "mpmcl load dsp0 ******"  in the 03.02.00.05 version ,  it is ok in 03.00.00.04.

I have checked the  bin file, the ELF pt_load segment like this:

Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000040 0x00800000 0x00800000 0x340d8 0x340d8 R E 0x20
LOAD 0x035000 0x00850000 0x00850000 0x0008c 0x39494 RW 0x1000
LOAD 0x03508c 0x00889494 0x00889494 0x00000 0x00018 R 0x4
LOAD 0x035090 0x008894b0 0x008894b0 0x00000 0x001b4 RW 0x8
LOAD 0x035090 0x00889664 0x00889664 0x00008 0x00008 RW 0x4
LOAD 0x035400 0x00889800 0x00889800 0x00200 0x00200 R E 0x400
LOAD 0x035600 0x0c000000 0x0c000000 0x00000 0x00040 RW 0x80
LOAD 0x035600 0x0c000080 0x0c000080 0x00000 0x00010 RW 0x80
LOAD 0x035600 0x0c520000 0x0c520000 0x00000 0x00208 RW 0x8
LOAD 0x035600 0xa0100000 0xa0100000 0x82ce0 0x82ce0 RWE 0x20
LOAD 0x0b82e0 0xa0182ce0 0xa0182ce0 0x00e5c 0x00e5c R 0x4
LOAD 0x0b9140 0xa0500400 0xa0500400 0x00000 0x0020c RW 0x8
LOAD 0x0b9140 0xb4a00000 0xb4a00000 0x00000 0x04000 RW 0x8
LOAD 0x0b9180 0xb4a24000 0xb4a24000 0x00000 0x13cf00 RW 0x80
LOAD 0x0b9180 0xb5904000 0xb5904000 0x00000 0x00010 RW 0x8
LOAD 0x0b9180 0xbe167800 0xbe167800 0x00000 0x00400 RW 0x80
LOAD 0x0b9180 0xbf56fb00 0xbf56fb00 0x00000 0xe1000 RW 0x80

how to slove the problem?

  • Hi,

    Is this an official, unmodified, TISDK and the reference TI K2K EVM ?

    Best Regards,
    Yordan
  • I also tried it on a K2H EVM board with official , unmodified, version , it was the same issue.


    1. I tried to use gdb to debug mpmsrv, it was core dump at
    #0 memset () at ../sysdeps/arm/memset.S:35
    #1 0x00016424 in ?? ()

    2. The abnormal bin file uses DDR, MSMC and L2. If run some other simple examples only use L2, it is OK.

    3. I have tried to copy the mpmsrv and mpmcl to the 03.00.00.04 filesystem, they were ok with the bin file.

  • I have tried many times and found the issue:
    If the load segment address is between 0x0c100000 and 0x0c600000 (the high 5Mbytes of MSMC), mpmsrv will segmentation fault.

    I think it is a big bug in the 03.02.00.05 version, how to slove the problem?
  • Hi,

    The abnormal bin file uses DDR, MSMC and L2.
    I have tried to copy the mpmsrv and mpmcl to the 03.00.00.04 filesystem, they were ok with the bin file.


    Could you provide the binary you use, so that I can test it on my setup?

    Best Regards,
    Yordan
  • yes, the bin file:3362.ue_core0.rar

    it is a very simple example

    tks!

  • Hi,

    I ran this on the following setup:
    Linux k2hk-evm 4.4.32-gadde2ca9f8

    The result is as follows:
    root@k2hk-evm:~# mpmcl reset dsp0
    reset succeeded
    root@k2hk-evm:~# mpmcl load dsp0 ue_core0.xe66
    Timeout in reading from socket
    load failed (error: 0)
    root@k2hk-evm:~#

    Not sure what your program does, or how did you compile it, but it seems like this could be a memory issue similar to the one described here:
    e2e.ti.com/.../575003

    Check that thread for clues.

    Hope this helps.

    Best Regards,
    Yordan
  • I have seen the memory issue similar to the one, but i t is different to my issue , it was error because of wrong address in the CMD file

    And ,I have found the problem, there is a different between the 03.00.00.04 and the 03.02.00.05 in the dtb file,like below:

    msmram@0c000000 {
    compatible = "mmio-sram";
    reg = <0xc000000 0x100000>;
    ranges = <0x0 0xc000000 0x100000>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    sram-mpm@0 {
    compatible = "ti,keystone-dsp-msm-ram";
    reg = <0x0 0x80000>;
    };
    };

    The code is newly added in the 03.02.00.05 version . As it means, i can only use 0xc000000~0xc080000 msmc memory in mpm .
    after modify the code to increase the range like this:
    msmram@0c000000 {
    compatible = "mmio-sram";
    reg = <0xc000000 0x580000>;
    ranges = <0x0 0xc000000 0x580000>;
    #address-cells = <0x1>;
    #size-cells = <0x1>;

    sram-mpm@0 {
    compatible = "ti,keystone-dsp-msm-ram";
    reg = <0x0 0x580000>;
    };
    };
    now, i can load and run the bin file.
  • but, i'm not sure it is really ok ,because there are some codes like this in dtb file, it is conflict to my modify
    cmem_block_mem@00c100000 {
    reg = <0x0 0xc100000 0x0 0x480000>;
    no-map;
    status = "okay";
    linux,phandle = <0x60>;
    phandle = <0x60>;
    };
    May be it is not a bug, developers want to use 5Mbytes msmc to do something in the 03.02.00.05 version.
    Can i delete "cmem_block_mem" code?
  • Hi,

    Can i delete "cmem_block_mem" code?


    This memory region is part of the cmem, you can check this by cat /proc/iomem:
    0c100000-0c57ffff : CMEM

    The cmem_block_mem is a reserved region of physically contiguous memory. This physically contiguous memory is useful as data buffers that will be shared with another processor or a hardware accelerator/DMA.
    This is explained in more details in the following wiki:
    processors.wiki.ti.com/.../CMEM_Overview
    Removing this may limit the use of shared memory between the cores inside the SoC and some examples (or your future custom functionalities) may not work correctly.

    So the wiser solution would be to change your code to fit in the available msmram.

    Best Regards,
    Yordan