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TMS320C6657: Emif_16

fatima kishwar
Prodigy 50 points

Part Number: TMS320C6657

Hello,

      I am trying to interface an FPGA Kintex7  Ultrscale to the DSP through the EMIF-16 interface looking at the Standard EMIF documentation I can see that the timing relationship of the EMIF outputs with the AECLKOUT from the DSP to the external interface is defined in the document (spruek6b.pdf ) but no such timing relationship is given for the EMIF-16 signals  (sprugz3a.pdf). Should I consider the same timing information of the EMIF-16  signals as the standard EMIF ones  with respect to the AECLKOUT.

Regards,

Fatima 

  • 0
    TI__Guru**** 161600 points
    Hi Fatima,

    I've asked the hardware designers to elaborate. Their feedback will be posted here.

    Best Regards,
    Yordan
  • 0
    TI__Mastermind 42545 points

    Hi Fatima,

    The document you referenced with specs for AECLKOUT (spruek6b) is not valid for the C6657. EMIF16 for the C6657 is asynchronous only and doesn't include a synchronous clock out or clock in.

    Regards,

    Bill

  • 0 in reply to Bill Taboada
    Prodigy 50 points
    Hi Bill,
    Thankyou for your reply. From what I understand the DSP uses its system clock divided by six for the EMIF -16 interface and tms320c6657.pdf pg 53 has a table of the min and max timing table of the signals with their relationship to the clock so was thinking could use the same clock somehow but from your reply that path would not be the right way ?
    thankyou
    fatima
  • 0 in reply to fatima kishwar
    TI__Mastermind 42545 points
    Hi Fatima,
    That clock is not available on a pin on the outside of the part. The clock is shown in the diagrams to provide a reference for the internal timing since the frequency of the clock varies with the system clock frequency. An external device must meet the setup and hold times defined in the data manual since only the CS, data and either OE or WE signals are available outside the part.
    Regards,
    Bill
  • 0 in reply to Bill Taboada
    Prodigy 50 points

    Hi Bill, 

    I am sorry I know I have accepted your answer and verified it but there is just one bit of confirmation I need from TI after going through the tms320c6657.pdf I found on pg. 84

    SYSCLK7: 1/6-rate clock for slow peripherals (GPIO, UART, Timer, I2C, SPI, EMIF16, McBSP, and so
    forth.) and sources the SYSCLKOUT output pin.

    So according to this we have the sysclk6 on sysclkout or am I missing something.

    Thankyou,

    Fatima.

  • 0 in reply to fatima kishwar
    TI__Mastermind 42545 points
    Hi Fatima,
    We don't have any timing correlation between the clock output on SYSCLKOUT and the EMIF16 interface so we can't provide any setup or hold times from the clock edges. SYSCLKOUT is provided as a test signal to determine the frequency programmed into the system PLL. It was never intended as a synchronous clock for the EMIF16 interface.
    Regards,
    Bill
  • 0 in reply to Bill Taboada
    Prodigy 50 points
    Thank you Bill for your reply and patience :)