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66AK2H14: Embedded Ethernet Boot ROM code stability

Part Number: 66AK2H14


Hello,

 

Our device has multiple 66AK2H14 connected to the Boot server over Ethernet in a chain as shown below:

[Boot Server] <-> [K2H] <-> [K2H] <-> [K2H]

 

All connections are SGMII links. K2H are set to Ethernet Bootmode (BOOTMODE is set to 0x3775), and use the embedded ROM bootcode to download a U-boot bootimage from the Boot Server using TFTP.

 

We encountered a problem with a single 66AK2H14 device where the link between two K2Hs cannot be established. We see that the first K2Hs can boot, but the two others cannot.

 

After switching to UART bootmode (BOOTMODE is set to 0x0777), every K2H boots, U-boot is pushed over UART and all the K2Hs are able to communicate with the Boot Server to retrieve the necessary boot files.

 

We also see that the problem is temperature related, after increasing the ambient temperature the devices boots as it should.

Can you guarantee that the embeded ROM SGMII SerDes settings are sufficient to provide 100% boot stability?

 

Kind Regards,

Krzysztof

  • Hi Krzysztof,

    Can you guarantee that the embeded ROM SGMII SerDes settings are sufficient to provide 100% boot stability?

    Yes, they should be.

    When you say:
    We also see that the problem is temperature related, after increasing the ambient temperature the devices boots as it should.

    Can you specify what is the change (initial temperature & later the increased temperature)?

    Best Regards,
    Yordan
  • Hi Yordan,

    Yordan Kovachev said:

    Can you specify what is the change (initial temperature & later the increased temperature)?

    The ambient temperature is around 25-30 degrees Celsius. We used a hot air gun to heat up the device. We've also verified that all solder joints are ok (X-ray inspection).

    Can it be, that this issue is related to MCSDK issue “SDOCM00114023: SGMII link up fails at low temperatures when using latest Linux SGMII driver” ?

     

    Regards,

    Krzysztof

     

  • Hi Krzysztof,

    Let me check this and I'll get back with my findings.

    Best Regards,
    Yordan
  • Hi,

    I looked at the SDOCM, and it is very likely that you're facing something similar. However I doubt that I can discuss this further on a public forum. Let me consult the design team to see how we should proceed about this.

    Best Regards,
    Yordan
  • Hi Krzysztof,

    Do you know the Silicon Rev of the K2H SOC? Did this happen on a few particular SOC or can be random on any SOC?
    SDOCM114023: The root cause was found to be the DFE_BW_SCALING register in the serdes lanes which is sensitive to low temperatures. As we discussed a year ago for the other high speed interfaces instablity issue on the K2H, the problem can be resolved by changing the PMA_LN_DFE_BW_SCALE field in lane 02c register to 11'b (full speed).

    Can you confirm the register reading for the SGMII lanes in your system? As this is set by ROM code, I am checking if we have any future PG plan or what our recommendation using Ethernet boot mode.

    Regards, Eric
  • Hello Eric,

    The chips on the board have the following signature:

    66AK2H14AAW

    $Q20-5AZDRK9

    2012 TI AAW G1

    I cannot confirm the register reading as the device stays in ROM code.

    Is it possible to hook up the debugger and read/write the SerDes settings using Code Composer? Is it a good test case?

    Regards,

    Krzysztof

  • Discussed offline, close this thread.

    Regards, Eric