AM5728: Errata i870 workaround

shigehiro tsuda

Part Number: AM5728

Hi,

There is a question in following eratta of AM5728.
i870 PCIe Unaligned Read Access Issue

2. Set the PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and PCIE_SS2_AXI2OCP_LEGACY_MODE_ENABLE bits to 0x1 in the
CTRL_CORE_SMA_SW_7 Control Module register. This will make all Read TLPs 32- bit aligned with all byte enables set to 1.

When this workaround 2 is used, may the data read as the description of the access of 8bit by the program definitely?
What kind of influence does it have?
Is it transfer throughput and memory size?

Best Regards,
Shigehiro Tsuda

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

You can try both options and see which works better for your use case.

0 shigehiro tsuda over 8 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser,

Thank you for quick reply.
Because it is errata of AM572x, is there more detailed information?
It is one of the important items in our customers.

Best Regards,
Shigehiro Tsuda

0 Biser Gatchev-XID over 8 years ago in reply to shigehiro tsuda

TI__Guru**** 393215 points

I have asked. If there is more detailed information the factory team will reply here.

0 shigehiro tsuda over 8 years ago in reply to Biser Gatchev-XID

Mastermind 9490 points

Hi Biser,

Thank you for quick reply.
Yes,we want more detailed information.
Please confirm it to your factory team.

Best Regards,
Shigehiro Tsuda

0 Mukul Bhatnagar over 8 years ago

TI__Guru* 83745 points

Hi Tsuda-san

Can you clarify the following from your original post - the question is not clear to me.

When this workaround 2 is used, may the data read as the description of the access of 8bit by the program definitely?

0 shigehiro tsuda over 8 years ago in reply to Mukul Bhatnagar

Mastermind 9490 points

Hi Mukul,

Thank you for quick reply.
Sorry for the confusing explanation.

I ask a re-question.

When this workaround 2 is used, does the read access of 8 bits not have any problem?
What kind of influence does it have in comparison with workaround 1?
Is it transfer throughput and memory size?

Best Regards,
Shigehiro Tsuda

0 Mukul Bhatnagar over 8 years ago in reply to shigehiro tsuda

TI__Guru* 83745 points

Tsuda-san

As stated, with workaround #2 the legacy mode can be used if you have a system where you will be issuing unaligned 8-bit and 16-bit read accesses to PCIe address space. The legacy mode will result in TLPs with 32-bit aligned addresses and all byte enables to one

The main impact of workaround 2. is that you can’t read just a single byte from the PCIe link partner. This could be an issue if a read of one of the other three bytes of the register you accessing automatically kicks off some event in the link partner.

Hope this helps.
Regards
Mukul

0 shigehiro tsuda over 8 years ago in reply to Mukul Bhatnagar

Mastermind 9490 points

Hi Mukul,

Thank you for quick reply and detailed examination.
I understood about the workaround 2 of i870 eratta and this impact by your answer.

Best Regards,
Shigehiro Tsuda

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AM5728: Errata i870 workaround