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C6472 The IPCGR and IPCAR

yang zhang53096
Prodigy 20 points

The IPCGRn (IPCGR0 thru IPCGR5) and IPCARn (IPCAR0 thru IPCAR5) registers facilitate inter-DSP
interrupts. This can be utilized by external hosts or C64x+ megamodules to generate interrupts to other
DSPs. A write of 1 to the IPCG field of IPCGRn register generates an interrupt pulse to C64x+
Megamodulen (n = 0-5). These registers also provide a source ID, by which up to 28 different sources of
interrupts can be identified.

where is the defined of  source ID?    SRCS[27:0]  

I only find the define of source ID for C6474.

  • 0
    TI__Guru* 84110 points

    If any external host or C64x+ megamodule writes to bit 31 of IPCGRn and then to bit 0 of IPCGRn (or both at the same time), then an interrupt will be forwarded to Core-n and bit 31 will be set. Since bit 31 is SRCS27, this means that SRCS 27 has been set and this source ID is active for this interrupt.

     

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