Other Parts Discussed in Thread: SYSBIOS
Hello Champs,
I looked through the motor_control example in am4378_ind_sdk_02.01.03.02\sysbios_ind_sdk_02.01.03.02\sdk\examples, below is the snip of adc.c code.
adc_base = CHIPDBBaseAddress(CHIPDB_MOD_ID_ADC1, 0);
HWREG (PRCM_CLKSEL_MAG_ADC) = 0; //Select OSC clock input
HWREG (PRCM_CLKCTRL_MAG_ADC) = 2; //Enable MAG ADC clocks
{
volatile int i=0;
for (;i < 100000; i++);
}
HWREG(adc_base + ADC0_ADC_CLKDIV) = \
0x00000001;
/* Configure the TS ADC controller by configuring the CNTL Register
* Set the HW Preempt Enable
* Set HW event mapping
* Disable Touch Screen
* ADC_Bias_Select is internal (0)
* Set Step configuration write Not protected
* Disable the step ID tag in the FIFO data
* Disable the ADC conversion (FSM needs to be configured before getting enabled)
* */
HWREG(adc_base + ADC0_CTRL) = 0 | \
((ADC0_CTRL_HW_PREEMPT_NOPREEMPT << ADC0_CTRL_HW_PREEMPT_SHIFT) | \
((ADC0_CTRL_HW_EVT_MAPPING_HWEVTINPUT << ADC0_CTRL_HW_EVT_MAPPING_SHIFT)) | \
(ADC0_CTRL_TOUCH_SCREEN_EN_DISABLE << ADC0_CTRL_TOUCH_SCREEN_EN_SHIFT) | \
(ADC0_CTRL_STEPCONFIG_WRITEPROTECT_N_NOTPROTECTED << ADC0_CTRL_STEPCONFIG_WRITEPROTECT_N_SHIFT) | \
(ADC0_CTRL_EN_DISABLE << ADC0_CTRL_EN_SHIFT) | \
(ADC0_CTRL_STEP_ID_TAG_WRZERO << ADC0_CTRL_STEP_ID_TAG_SHIFT));
The adc_base is defined for ADC1, but the below HWREG use the adc_base address for ADC0 register.
Is it a typo? Please confirm.
Thanks.
Rgds
Shine
