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AM3517: Bit-flips with Micron NAND

Part Number: AM3517

Hello,

We are using AM3517AZCN on a custom PCB. We changed the NAND chip from Samsung K9F2G08U0C-SIB0 (256MB) to Micron MT29F2G08ABAEAWP-IT:E (256MB) and after a few months of use with the Micron NAND we started to detect bit-flip issues. No bit-flip issues were ever detected on units with the old NAND that has been in use for many years, which is why this is alarming to us. So far we've only experienced single bit-flips per page (128kB) which means they are correctable by U-Boot but if any corrections have been made in the environment partition it gets rejected and U-Boot goes for a default environment instead. There has also been about 3-4 bit-flips in the kernel partition (4MB) on these units.

Why is U-Boot per default not accepting the env after correction(s) has been made?
To clarify: This is with U-boot configured without CONFIG_ENV_OFFSET_REDUND, ENV_IS_EMBEDDED and CONFIG_ENV_OFFSET_OOB.
We're using U-boot v2010.12 but as far as we can tell this seems to still be the case in the current latest version at https://git.ti.com/ti-u-boot/ti-u-boot.

Have anyone else experienced bit-flip problems with Micron NAND's or have any idea on why we are seeing this issue after the change of NAND?

Thanks in advance,
Rickard

  • Hi,

    What are your ECC schemes for U-boot and kernel?
  • I can't seem to find the name of the scheme but what I can find in the U-Boot source is that the default ECC mode: NAND_ECC_SOFT is being used which claims to be able to correct 1 bit error for a 256 byte block. Is that sufficient info?
    I have changed U-boot to allow the use of a corrected environment and re-save it in order get rid of current bit-flips.
  • My conclusion after looking deeper into this matter is that we are using too weak ECC correction. The minimum requirement from Micron is to use 4-bit ECC and AM3517 don't support more than 1-bit HW ECC and the U-Boot we use only has 1-bit SW ECC. I'm only guessing that U-Boot is not accepting a single bit-correction since HW ECC is supposed to correct all the bit-flips before U-Boot reads the NAND and therefore we have ourselves a problem.