Linux/DRA722: About the OCP2SCP_TIMING register configuration

Jack user

Part Number: DRA722

Tool/software: Linux

I met a problem , from the DRA72xx TRM,i get some discriptions like the following:

"the OCP2SCP_TIMING[9:7] DIVISIONRATIO bit field, with a valid range of 0x1 to 0x7,The OCP2SCP_TIMING[6:4] SYNC1 timing information is programmable in the range 0 to 7 clock cycles, and shows the acceptable delay between the enable and command availability on SCP. The value of OCP2SCP_TIMING[3:0] SYNC2 is also programmable in the range 1 to 15 clock cycles, measured from the moment the command is available on SCP until data is accessible."

I want to know is there any effects if we set different value to OCP2SCP_TIMING register?

over 9 years ago

0 Yordan Kamenov over 9 years ago

TI__Mastermind 42515 points

Hi,

I have forwarded your question to experts for comment.

Regards,
Yordan

0 Stanislav Stilyanov over 9 years ago

TI__Mastermind 25080 points

Hi,

Can you describe the exact problem?

Which OCP2SCP instance is this?

Normally the values from the TRM should work ok.

0 Jack user over 9 years ago in reply to Stanislav Stilyanov

Expert 1080 points

Hi,
In the promotion of usb eye diagram when we set the value here is 0x0000038f,I would like to know which value to set will be better or
Or what is the effect of different values?
thank you ~

0 Stanislav Stilyanov over 9 years ago in reply to Jack user

TI__Mastermind 25080 points

OCP2SCP is a simple internal bridge. It will not affect the USB eye diagram. See the USB2PHY registers in USB chapter instead.

0 Jack user over 9 years ago in reply to Stanislav Stilyanov

Expert 1080 points

what is the effect of different values? we set the value here is 0x0000038f means DIVISIONRATIO is 7 and SYNC1 is 0 and SYNC2 is 15. Why should this be set up?

0 Stanislav Stilyanov over 9 years ago in reply to Jack user

TI__Mastermind 25080 points

Those settings were confirmed after actual silicon appeared. That's why the software patch.
Actually I've even tested leaving reset values, and I still had PHY access, but still this is not the right thing to do.
Kindly write the recommended value. There is nothing more that user needs to know about OCP2SCP.

0 Jack user over 9 years ago in reply to Stanislav Stilyanov

Expert 1080 points

thanks,I set the value here is 0x000002bf,Does these values affect the connectivity of the Usb port?

0 Stanislav Stilyanov over 9 years ago in reply to Jack user

TI__Mastermind 25080 points

Again, the value can cause wrong accesses to the PHY internal registers. USB port connectivity is another story.
If you are able to write and read to USB2PHY registers, then your value is probably ok.

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Linux/DRA722: About the OCP2SCP_TIMING register configuration