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TCI6638K2K: Semaphore2 module

Masashi Ohhashi
Expert 4805 points
Part Number: TCI6638K2K

Hi,

We would like to confirm the description about Semaphore2 on datasheet(tci6638k2k_revE.pdf) and User's guide(sprugs3a.pdf).

1.  "11.28 Semaphore2" in datasheet describes below.

    "The Semaphore module supports three masters and contains 32 semaphores that can be shared within the system."

    1-1.  We think "masters" mean C66x cores. Is our understanding correct?

    1-2.  TCI6638K2K has 8 cores. So we expect that the semaphore module supports 8 masters, If Q1-1 is corrected. Does the Semaphore supports 3 cores or 8 cores?

    1-3. It seems the flags has 64 in "10.7 Flag Registers" in User's guide. So we expect the semaphore module supports 64 semaphores. Does the semaphore supports 32 semaphores or 64 semaphores?   

2.  "1.3 Functional Block Diagram" in User's guide describes below.

    "The module supports up to 64 semaphores that can be accessed by all four cores."

    2-1. TCI6638K2K has 8 cores. So we expect that 8 cores can access the Semaphore module. How many cores can access the module?

Best Regards,

Masashi Ohhashi

  • 0
    TI__Guru 65405 points
    Hi Masashi,

    I've forwarded this to the experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Guru**** 161600 points

    Hi,

    It is not very clear in the datasheet.  Bellow is my understanding (let the k2k experts confirm/correct it).

    You are correct. The masters are the processor cores.
    And yes, it seems that the Semaphore module can be accessed by three masters at the same time. The access is as described bellow:
    There are two methods of accessing a semaphore resource:
    • Direct Access: A C66x CorePac directly accesses a semaphore resource. If free, the semaphore is granted. If not free, the semaphore is not granted.
    • Indirect Access: A C66x CorePac indirectly accesses a semaphore resource by writing to it. Once the resource is free, an interrupt notifies the C66x CorePac that the resource is available.

    Best Regards,
    Yordan

  • 0 in reply to Yordan Kovachev
    TI__Expert 4805 points

    Yordan-san,

    Thank you for your reply.

    I'm sorry to ask you again. I would like to confirm it. Does the semaphore support to be accessed by only 3 cores?

    TCI6638K2K datasheet says "The Semaphore module supports three masters and contains 32 semaphores that can be shared within the system." in "11.28 Semaphore2". But User's guide says "The module supports up to 64 semaphores that can be accessed by all four cores." in "1.3 Functional Block Diagram". These descriptions confused us. So we expect the semaphore module supports to be accessed by all 8 cores. Could you please tell us how many cores to be supported?

    Best Regards,

    Masashi Ohhashi

  • 0 in reply to Masashi Ohhashi
    TI__Guru**** 161600 points
    Hi,

    Does the semaphore support to be accessed by only 3 cores?

    Yes, this is my understanding. Semaphore can be accessed by 3 cores at a time.

    TCI6638K2K datasheet says "The Semaphore module supports three masters and contains 32 semaphores that can be shared within the system." in "11.28 Semaphore2". But User's guide says "The module supports up to 64 semaphores that can be accessed by all four cores." in "1.3 Functional Block Diagram".


    The user guide is a common document for ALL keystone devices. The datasheet describes the specific implementation of TCI6638K2K. That is why the documents differ from each other.

    I've looped the Radar team to elaborate further, if necessary.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Genius 12135 points

    On K2K all 32 Semaphores are available to all 8 DSP cores and four ARM cores.

    Sudhanand