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TMDX5535EZDSP: ADS1299 Integration

Part Number: TMDX5535EZDSP

Hi there,

We've purchased the ADS1299EEGFE-PDK kit and now we want to develop our own EEG solution. For this solution, we want to have a real time application with a sampling rate of 1kS/s, apply 2 filters to the output of the 8 channels of the ADS1299 and also run an FFT and compute the spectrum density of the signal. We've chosen the CC5535 because it has a FFT coprocessor, which might help with all the processing the DSP has to do, but I'm afraid that it won't be enough. Is there any way to compute the ammount of time needed for the DSP to complete the various processes (each filter and FFT) in order to determine if we need to move to a higher clock DSP?

Thank you very much,

Luis

  • Hi Luis,

    I've notified the C5000 team. Their feedback will be posted here.

    Best Regards,
    Yordan
  • Hi Yordan,

    Thank you very much!

    Best regards,

    Luís
  • Luis,

    Do you have the code already written for your DSP routines?

    If so, you could profile each algorithm by using CCS. http://processors.wiki.ti.com/index.php/Profile_clock_in_CCS

    You could put breakpoints along your code and see exactly how many cycles each routine takes.

    Alternatively, I also want to point out that we have an example in the CSL v3.07 that has some PROFILE_CYCLES code that you could mimic.

    Please see the example C:\ti\c55_lp\c55_csl_3.07\demos\audio-preprocessing and look for the macro #ifdef PROFILE_CYCLES

    This will give you an idea on how to write your own profile code in your application.

    Hope this helps.

    Lali

  • Hi,

    No, we haven't written any code yet because we don't know if the C5000 series is enough to fulfill our needs. Also, without having the actual output of the filters and FFT, we don't know if that's enough to get the desired result. Could all of these steps be made in a simulator ?

    And how could the SPI communication with the ADS1299 be simulated? This is another key factor: we need continuous sampling. If the CPU needs to stop a filter or FFT to collect samples, is the output of those functions going to be corrupt? Or can't they be interrupted at all ? Do we need a small uC to acquire all samples and send them via DMA to the DSP ? Or is that not an issue.

    We just want to be sure the C5000 series is enough for our purpose before commiting to buying a dev kit.

    Best regards,

    Luis

  • Would it be possible to answer my previous post please?

    Best regards,

    Luis

  • Luis,

    It really is difficult to predict performance/behavior by theorizing since you have external hardware interfaced to the DSP. Would encourage you if possible to get a C5535 ezdsp and run on actual hardware to evaluate. There are some C5000 simulators in CCSv5. I don't think there is any support for in CCSv6 for simulators since we are trying to encourage evaluation on EVMs.

    The data corruption may not be an issue if you have written the software well and schedule things correctly. Again, its difficult to say. You will have to play with code on hardware to see for yourself.
    I'm sorry I don't have more details for you. If you need help with the CCS simulators, you can ask on the CCS e2e forum.

    Lali