Linux: Does DM368 (Linux) platform support fastboot in uboot?

Hi Dwarkesh:
Thanks~

I have enabled fastboot in DM368 uboot.
The fastboot device can be found on Window 7 now.

But we can't receive any packet from PC side.
The fastboot will always show "No such device or address" in PC side.

fastboot.exe flash boot ipnc_dm368.squashfs
sending 'boot' (25112 KB)...
FAILED (command write failed (No such device or address))
finished. total time: 0.004s


We have integrated it from this git below.
arago-project.org/.../
~\u-boot\common\cmd_fastboot.c
~\u-boot\drivers\usb\musb\musb_udc.c


I also add these config for my uboot too.
#define PINMUX4 0x01c40010
#define PINMUX4_USBDRVBUS_BITCLEAR 0x3000
#define PINMUX4_USBDRVBUS_BITSET 0x2000

/* USB Configuration */
#define CONFIG_USB_DAVINCI
#define DAVINCI_DM365EVM
#define CONFIG_MUSB_UDC 1
#define CONFIG_MUSB_HCD 1

#define CONFIG_USB_DEVICE 1
#define USB_BCD_VERSION 0x0110

//#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_USBD_VENDORID 0x0451
#define CONFIG_USBD_PRODUCTID 0x5678
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME "DM365VM"

#define CONFIG_FASTBOOT_TRANSFER_BUFFER (PHYS_SDRAM_1 + SZ_16M)
#define CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE (SZ_128M - SZ_16M)

The final result is that we can found fastboot device.
But we can't send any data now.

And the log seems normal.
I can't find any wrong in usb driver.

Fail Log:
rd ###
DM36x initialization passed!
TI UBL Version: 1.50
Booting Catalog Boot Loader
BootMode = NAND
Starting NAND Copy...
Valid magicnum, 0xA1ACED66, found in block 0x00000019.
DONE
Jumping to entry point at 0x81080000.


U-Boot 1.3.4-dirty (Apr 11 2017 - 18:45:54) DM368-IPNC-3.1.0

I2C: ready
DRAM: 128 MB
NAND: NAND device: Manufacturer ID: 0xec, Chip ID: 0xf1 (Samsung NAND 128MiB 3,3V 8-bit)
Bad block table found at page 65472, version 0x01
Bad block table found at page 65408, version 0x01
128 MiB
*** Warning - bad CRC or NAND, using default environment

In: serial
Out: serial
Err: serial
ARM Clock :- 432MHz
DDR Clock :- 340MHz
Hit any key to stop autoboot: 1
Starting fastboot protocol
fastboot initialized

Hi Hou,

Good to know you are trying to enable it. Can you try the same in a Linux machine ? It would be faster to debug. We need to check if there is enumeration happening. We can check through lsusb and dmesg if it in linux.

Hi Dwarakesh:

I have tried android_winusb.inf.

It can't solve this problem.

And I have attached lsusb.txt and kmsg.txt in linux PC.

I still can't find anything wrong.

lsusb.txt

3021.lsusb.txt

kmsg.txt (Linux PC)

2350.kmsg.txt

Hi Hou,

I suspect on the Bulk endpoint configuration and running at DM3x end, since enumeration is fine and only data transfer is having issue. Did you check the fastboot devices list at the PC end ? What happens interms of error, when trying fastboot command from linux machine ?

Hi Dwarakesh:
When I use fastboot flash boot ipnc_dm368.squashfs, it occurs error below.

sending 'boot' (25112 KB)...
FAILED (command write failed (No such device or address))
finished. total time: -0.000s

And I found the PC side always send USB_REQ_GET_DESCRIPTOR to get serial number from DM368 when I call "fastboot flash boot ipnc_dm368.squashfs" in PC side.

I have no idea for it now.
DarkHou

Hi Hou,

You can debug in file drivers/usb/musb/musb_hcd.c, since that is the DM3x device end implementation for receiving USB_REQ_GET_DESCRIPTOR and see if any failure happening(does it come here).

Hi Dwarakesh:
musb_hcd.c is for usb host control.
Because DM368 is slave now. (b-peripheral as fastboot device)
I don't think we should look this file. (musb_hcd.c)
DarkHou

Hi Hou,

Oops you are right, wrong file. Basically i wanted to check the DM3x side for this Descriptor request. drivers/usb/gadget/ep0.c:

Hi Dwarakesh :
I find descriptor request is normal behavior.
Because fastboot will get serial number when we execute one command.

The problem should focus we can't receive packet in bulk mode.
I have add log in fastboot client.
usb_write():
n = ioctl(h->desc, USBDEVFS_BULK, &bulk);

The ioctl is normal.
But DM368 can't receive any event after it.
Do you have any idea for it?
DarkHou

Hi Dwarakesh:

After dumping register, I found we have receive data from Linux PC.

ex.

fastboot reboot

I receive "reboot" in ep1 rx.

peri_rxcount1: 6
peri_rxcount1 data: reboot

But DM368 doesn't enter RX state.

It keeps in idle state always.

Register dump:

peri_rxcount1: 6
peri_rxcount1 data: reboot
faddr:0x24
power:0x40
intrtx:0x0
intrrx:0x0
intrtxe:0x1f
intrrxe:0x1e
intrusb:0x8
intrusbe:0x0
index:0x4
rxmaxp:0x0
rxcount:0x0
fifosize:0x33

Hi Dwarakesh:
I trace code from musb_udc.c
musb_peri_ep0_rx_data_request will set RX state.
But we don't receive any control packet for it.
Do you have any idea which part should I check for it?
thanks you for your great help.

musb_udc.c:
static void musb_peri_ep0_idle(void)
{
...
if (USB_REQ_DEVICE2HOST == (reqType & USB_REQ_DIRECTION_MASK)) {
err = ep0_recv_setup(ep0_urb);
/* Device to host */
musb_peri_ep0_tx_data_request(err);
} else {
/*
* Host to device
*
* The RX routine will call ep0_recv_setup
* when the data packet has arrived.
*/
musb_peri_ep0_rx_data_request();
}
...
}

And I found one register is wrong.
INTRRX is 0 when we receive data from Linux PC.

intrtx:0x0
intrrx:0x0 <---- It should not be 0
intrtxe:0x1f
intrrxe:0x1e
intrusb:0x8
intrusbe:0x0

I don't sure if it is root cause for this problem.
DarkHou

Hi Dwarakesh:
I solve it already.
The root cause is below.
Intmsksetr doens't be set rightly.

TI uboot davinci.h has one thing wrong.

davinci.h:
struct davinci_usb_regs {
u32 version;
u32 ctrlr;
u32 reserved[0x20]; <-- it should be u8 not u32
u32 intclrr;
u32 intmskr;
u32 intmsksetr;
};

Register from sprufy9.pdf:
4h CTRLR Control Register
8h STATR Status Register
10h RNDISR RNDIS Register
14h AUTOREQ Autorequest Register
20h INTSRCR USB Interrupt Source Register
24h INTSETR USB Interrupt Source Set Register
28h INTCLRR USB Interrupt Source Clear Register
2Ch INTMSKR USB Interrupt Mask Register
30h INTMSKSETR USB Interrupt Mask Set Register
34h INTMSKCLRR USB Interrupt Mask Clear Register
38h INTMASKEDR USB Interrupt Source Masked Register <-- intmsksetr

And musb_udc.c should read intmskedr register to get tx and tx interrupt.
musb_udc.c
void udc_irq(void)
{
...
//My Patch
dregs = (struct davinci_usb_regs *)DAVINCI_USB0_BASE;
tmp = readl(&dregs->intmskedr);
writel(tmp, &dregs->intclrr);

intrrx = (tmp & DAVINCI_USB_RXINT_MASK) >> DAVINCI_USB_RXINT_SHIFT;
intrtx = (tmp & DAVINCI_USB_TXINT_MASK) >> DAVINCI_USB_TXINT_SHIFT;
intrusb = (tmp & DAVINCI_USB_USBINT_MASK) >> DAVINCI_USB_USBINT_SHIFT;

if(intrrx )
{
//read rx packet from host.
}
}

Thanks you for your great help.

DarkHou

Hi Hou,

Congrats, Good to hear.