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LCDC and EMIFA SDRAM

Raz Aloni
Prodigy 160 points
Other Parts Discussed in Thread: OMAPL138

The LCDC documentation mentions that external memory needs to be used to hold frame buffers. I planned on using an SDRAM on EMIFA CS[0] to hold my buffers as well as some image data.
Before finishing the design of my custom board, I used the LCDK to test my project, using the DDR since CS0 was not completely broken out on the kit.

My code using the DDR worked without a problem, using a single buffering method with the LCD DMA. However, after moving to the custom board and chagning the code to have the DMA point to 0x40000000. The DMA never starts a transfer. How can I get the LCDC DMA to work from the SDRAM? (And yes, the SDRAM is correctly connected and can be written to/ read from).

  • 0
    TI__Guru* 84865 points

    Hi Raz

    Unfortunately this is not going to work. When LCD documentation mentions external memory, in context of OMAPL138 family it means DDR controller only. The LCDC cannot access the EMIFA memory map space - this is mentioned in the memory map table 3-4 in the OMAPL138 datasheet and also shown in Table 4-1 in the System Interconnect Chapter in the TRM. 

    I hope you do have DDR in your custom board, such that you can just program the addresses to be DDR. Otherwise this will need a redesign of your board to include DDR. 

    Regards

    Mukul 

  • 0 in reply to Mukul Bhatnagar
    Prodigy 160 points
    Unfortunately we do not have the DDR broken out on our custom board and there is no time to redesign the board. Is there any way to display anything on the LCDC without the DDR?