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Hello,
i have configured a periodic function this way:
bios.PRD.instance("PRD0").order=1;
bios.PRD.instance("PRD0").period=1;
bios.PRD.create ("prdClock0");
bios.PRD.USECLK=1;
bios.PRD.MICROSECONDS=1;
bios.CLK.RESETTIMER=1;
bios.CLK.TIMMODE="32-bit chained";
bios.PRD.instance("PRD0").fxn=prog.exter("my_prd")
I have set a breakpoint at the periodic function my_prd and it never goes inside.
any idea please?
I don't see any reason you shouldn't be able to enter the my_prd function. I don't see the use for the creation of prdClock0 in this example either but I am assuming this is erroneous for the purpose of this inquiry. Do you have a test case you can share which demonstrates the failure to enter PRD function?Miguel Torres said:bios.PRD.instance("PRD0").order=1;
bios.PRD.instance("PRD0").period=1;
bios.PRD.create ("prdClock0");
bios.PRD.USECLK=1;
bios.PRD.MICROSECONDS=1;
bios.CLK.RESETTIMER=1;
bios.CLK.TIMMODE="32-bit chained";
bios.PRD.instance("PRD0").fxn=prog.extern("my_prd");
Thank you for answering,
I ´ve created the PRD object prdClock0 to associate it with the function my_prd wich i want to be called periodically
this is the code of the function my_prd i use it to test
void my_prd (void)
{
fprintf (stdout,"as");
}
I have also added this function:
a = PRD_getticks ();
fprintf(stdout,%d,a);
the value of a variable doesn´t change , unless i add previously PRD_tick, instruction.
I copied the code snippet again because I think I am misunderstanding what you need to do. In this snippet you are associating your function my_prd() with the PRD object PRD0 and not prdClock0. I have highlighted this in bold.Miguel Torres said:bios.PRD.instance("PRD0").order=1;
bios.PRD.instance("PRD0").period=1;
bios.PRD.create ("prdClock0");
bios.PRD.USECLK=1;
bios.PRD.MICROSECONDS=1;
bios.CLK.RESETTIMER=1;
bios.CLK.TIMMODE="32-bit chained";
bios.PRD.instance("PRD0").fxn=prog.extern("my_prd");
yes , I associate de function my_prd() to the PRD object PRD0, then i checked the option
use CLK Manager to drive PRD, on Periodic function manager in PRD properties;
when i checked this option the PRD_clock is created.
the purpuose of this project is just take a look on how PRD function cause i need to use it in a
project i am building. here is my tcf in txt:
utils.loadPlatform("ti.platforms.evmDM6446");
/* The following DSP/BIOS Features are enabled. */
bios.enableMemoryHeaps(prog);
bios.enableRealTimeAnalysis(prog);
bios.enableRtdx(prog);
bios.enableTskManager(prog);
bios.GBL.ENABLEINST = 0;
bios.GBL.ENABLEALLTRC = 0;
bios.GBL.C64PLUSL1PCFG = "16k";
bios.GBL.C64PLUSL1DCFG = "16k";
bios.GBL.C64PLUSL2CFG = "32k";
bios.GBL.C64PLUSMAR128to159 = 0x0000ffff;
bios.MEM.STACKSIZE = 0x1000;
bios.GBL.ENABLEALLTRC = 1;
bios.GBL.ENABLEINST = 1;
bios.MEM.USERCOMMANDFILE = 1;
bios.MEM.instance("DDR2").createHeap = 1;
bios.MEM.instance("DDR2").heapSize = 0x00004000;
bios.MEM.instance("DDR2").enableHeapLabel = 1;
bios.MEM.instance("DDR2").heapLabel = prog.extern("ext_heap");
bios.MEM.instance("DDR2").heapLabel = prog.extern("extHeap");
bios.MEM.instance("IRAM").len = 0x00008000;
bios.MEM.instance("L1DSRAM").len = 0x00010000;
bios.MEM.create("L1PSRAM");
bios.MEM.instance("L1PSRAM").base = 0x11e08000;
bios.MEM.instance("L1PSRAM").len = 0x00004000;
bios.MEM.instance("L1PSRAM").createHeap = 0;
bios.GBL.ENABLEALLTRC = 0;
bios.GBL.ENABLEINST = 0;
bios.MEM.BIOSOBJSEG = prog.get("DDR2");
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.BIOSOBJSEG = prog.get("DDR2");
//bios.MEM.REUSECODESPACE = 0;
bios.MEM.ARGSSEG = prog.get("DDR2");
bios.MEM.GBLINITSEG = prog.get("DDR2");
bios.MEM.TRCDATASEG = prog.get("DDR2");
bios.MEM.SYSDATASEG = prog.get("DDR2");
bios.MEM.OBJSEG = prog.get("DDR2");
bios.MEM.BIOSSEG = prog.get("DDR2");
bios.MEM.SYSINITSEG = prog.get("DDR2");
bios.MEM.HWISEG = prog.get("DDR2");
bios.MEM.HWIVECSEG = prog.get("DDR2");
bios.MEM.RTDXTEXTSEG = prog.get("DDR2");
bios.BUF.OBJMEMSEG = prog.get("DDR2");
bios.SYS.TRACESEG = prog.get("DDR2");
bios.LOG.instance("LOG_system").bufSeg = prog.get("DDR2");
bios.STS.OBJMEMSEG = prog.get("DDR2");
bios.GBL.INSTRUMENTED = 0;
bios.GBL.INSTRUMENTED = 1;
bios.GBL.ENABLEINST = 1;
bios.GBL.ENABLEINST = 0;
bios.GBL.SPECIFYRTSLIB = 0;
bios.RTDX.MODE = "Simulator";
bios.RTDX.RTDXDATASEG = prog.get("DDR2");
bios.HST.HOSTLINKTYPE = "NONE";
bios.HST.OBJMEMSEG = prog.get("DDR2");
bios.RTDX.RTDXDATASEG = prog.get("IRAM");
bios.RTDX.MODE = "JTAG";
bios.RTDX.ENABLERTDX = 0;
bios.TSK.instance("TSK_idle").stackSize = 512;
bios.TSK.instance("TSK_idle").stackMemSeg = prog.get("DDR2");
bios.TSK.ENABLETSK = 0;
bios.MEM.USERCOMMANDFILE = 0;
bios.MEM.TEXTSEG = prog.get("DDR2");
bios.MEM.SWITCHSEG = prog.get("DDR2");
bios.MEM.BSSSEG = prog.get("DDR2");
bios.MEM.FARSEG = prog.get("DDR2");
bios.MEM.CINITSEG = prog.get("DDR2");
bios.MEM.PINITSEG = prog.get("DDR2");
bios.MEM.CONSTSEG = prog.get("DDR2");
bios.MEM.DATASEG = prog.get("DDR2");
bios.MEM.CIOSEG = prog.get("DDR2");
bios.GBL.CLKOUT = 594.0000;
bios.CLK.SPECIFYRATE = 1;
bios.MEM.REUSECODESPACE = 0;
bios.GBL.C64PLUSL1PCFG = "0k";
bios.GBL.C64PLUSL1DCFG = "0k";
bios.GBL.C64PLUSL2CFG = "0k";
bios.GBL.C64PLUSMAR128to159 = 0x00000000;
bios.GBL.C64PLUSL1PCFG = "16k";
bios.GBL.C64PLUSL1DCFG = "16k";
bios.GBL.C64PLUSL2CFG = "32k";
bios.GBL.C64PLUSMAR128to159 = 0x0000ffff;
bios.MEM.instance("IRAM").createHeap = 0;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").enableHeapLabel = 1;
bios.MEM.instance("IRAM").heapLabel = prog.extern("IRAM_HEAP");
bios.MEM.instance("IRAM").heapSize = 0x00000080;
bios.MEM.STACKSIZE = 0x0600;
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.instance("IRAM").heapSize = 0x00001000;
bios.MEM.instance("IRAM").createHeap = 0;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").enableHeapLabel = 1;
bios.MEM.instance("IRAM").heapLabel = prog.extern("heap_iram", "asm");
bios.MEM.STACKSIZE = 0x0200;
bios.MEM.STACKSIZE = 0x1000;
bios.GBL.C64PLUSL1DCFG = "32k";
bios.MEM.instance("L1DSRAM").len = 0x0000c000;
bios.GBL.C64PLUSL1DCFG = "16k";
bios.MEM.instance("L1DSRAM").len = 0x00010000;
bios.GBL.C64PLUSL1DCFG = "32k";
bios.MEM.instance("L1DSRAM").len = 0x0000c000;
bios.LOG.OBJMEMSEG = prog.get("DDR2");
bios.IDL.OBJMEMSEG = prog.get("DDR2");
bios.SEM.OBJMEMSEG = prog.get("DDR2");
bios.MBX.OBJMEMSEG = prog.get("DDR2");
bios.QUE.OBJMEMSEG = prog.get("DDR2");
bios.LCK.OBJMEMSEG = prog.get("DDR2");
bios.RTDX.RTDXDATASEG = prog.get("DDR2");
bios.PIP.OBJMEMSEG = prog.get("DDR2");
bios.SIO.OBJMEMSEG = prog.get("DDR2");
bios.MEM.STACKSIZE = 0x0200;
bios.GBL.ENABLEINST = 1;
bios.HST.instance("RTA_fromHost").bufSeg = prog.get("DDR2");
bios.HST.instance("RTA_toHost").bufSeg = prog.get("DDR2");
bios.GBL.ENABLEINST = 0;
bios.GBL.INSTRUMENTED = 0;
bios.GBL.INSTRUMENTED = 1;
bios.GBL.INSTRUMENTED = 0;
bios.MEM.instance("IRAM").createHeap = 0;
bios.MEM.NOMEMORYHEAPS = 1;
bios.MEM.NOMEMORYHEAPS = 0;
bios.MEM.instance("DDR2").createHeap = 1;
bios.MEM.instance("DDR2").heapSize = 0x00100000;
bios.MEM.BIOSOBJSEG = prog.get("DDR2");
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.instance("IRAM").createHeap = 0;
bios.GIO.ENABLEGIO = 0;
bios.GBL.INSTRUMENTED = 1;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.instance("IRAM").createHeap = 0;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").heapSize = 0x00000800;
bios.MEM.instance("IRAM").heapSize = 0x00001000;
bios.MEM.instance("IRAM").enableHeapLabel = 1;
bios.MEM.instance("IRAM").heapLabel = prog.extern("IramHeap");
bios.MEM.instance("IRAM").enableHeapLabel = 0;
bios.MEM.MALLOCSEG = prog.get("DDR2");
bios.MEM.instance("IRAM").createHeap = 0;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").heapSize = 0x00000200;
bios.MEM.instance("IRAM").heapSize = 0x00001000;
bios.MEM.ARGSSIZE = 0x0020;
bios.MEM.STACKSIZE = 0x0400;
bios.MEM.ARGSSIZE = 0x0200;
bios.MEM.ARGSSIZE = 0x0020;
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.STACKSIZE = 0x0300;
bios.MEM.STACKSIZE = 0x0600;
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.ARGSSIZE = 0x0004;
bios.TSK.ENABLETSK = 1;
bios.TSK.STACKSEG = prog.get("MEM_NULL");
bios.TSK.instance("TSK_idle").order = 1;
bios.TSK.create("TSK_Receptor");
bios.TSK.instance("TSK_Receptor").order = 3;
bios.TSK.instance("TSK_Receptor").priority = 4;
bios.TSK.instance("TSK_Receptor").fxn = prog.extern("receiver_tsk_function");
bios.MEM.STACKSIZE = 0x0200;
bios.TSK.instance("TSK_idle").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_Receptor").stackMemSeg = prog.get("L1DSRAM");
bios.TSK.instance("TSK_Receptor").stackSize = 2048;
bios.TSK.instance("TSK_Receptor").priority = 4;
bios.TSK.instance("TSK_Receptor").stackSize = 3072;
bios.TSK.instance("TSK_Receptor").stackSize = 2048;
bios.TSK.instance("TSK_Receptor").stackSize = 4096;
bios.TSK.instance("TSK_Receptor").stackSize = 7000;
bios.TSK.instance("TSK_Receptor").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_Receptor").stackSize = 10000;
bios.TSK.instance("TSK_Receptor").stackSize = 50000;
bios.TSK.instance("TSK_Receptor").stackSize = 28000;
bios.TSK.instance("TSK_Receptor").fxn = prog.extern("tsk_viterbi");
bios.TSK.create("SRC_VIT");
bios.TSK.instance("SRC_VIT").order = 4;
bios.TSK.instance("SRC_VIT").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("SRC_VIT").fxn = prog.extern("tsk_source_Viterbi");
bios.TSK.instance("SRC_VIT").order = 2;
bios.TSK.instance("TSK_Receptor").destroy();
bios.TSK.create("TSK_VIT");
bios.TSK.instance("TSK_VIT").order = 5;
bios.TSK.instance("TSK_VIT").order = 3;
bios.TSK.instance("TSK_VIT").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_VIT").fxn = prog.extern("tsk_viterbi");
bios.TSK.instance("TSK_VIT").priority = 2;
bios.TSK.instance("TSK_VIT").priority = 1;
bios.TSK.instance("TSK_VIT").priority = 2;
bios.TSK.instance("TSK_VIT").priority = 1;
bios.TSK.instance("TSK_VIT").priority = 2;
bios.TSK.create("TSK_FORNEY");
bios.TSK.instance("TSK_FORNEY").order = 4;
bios.TSK.instance("TSK_FORNEY").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_FORNEY").fxn = prog.extern("forney_tsk");
bios.TSK.instance("SRC_VIT").priority = 2;
bios.TSK.instance("TSK_FORNEY").priority = 2;
bios.TSK.create("TSK_RS");
bios.TSK.instance("TSK_RS").order = 5;
bios.TSK.instance("TSK_RS").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk", "asm");
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk");
bios.TSK.instance("TSK_FORNEY").stackSize = 3000;
bios.TSK.instance("TSK_RS").stackSize = 3000;
bios.TSK.instance("TSK_VIT").stackSize = 3000;
bios.TSK.instance("TSK_RS").stackSize = 4000;
bios.MEM.instance("DDR2").heapSize = 0x00080000;
bios.MEM.instance("DDR2").len = 0x08000000;
bios.TSK.instance("TSK_RS").order = 4;
bios.TSK.instance("TSK_FORNEY").destroy();
bios.TSK.instance("TSK_RS").destroy();
bios.MEM.instance("IRAM").createHeap = 0;
bios.TSK.create("TSK_FORNEY");
bios.TSK.instance("TSK_FORNEY").order = 4;
bios.TSK.instance("TSK_FORNEY").stackSize = 3000;
bios.TSK.instance("TSK_FORNEY").fxn = prog.extern("forney_tsk");
bios.TSK.instance("TSK_FORNEY").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_FORNEY").priority = 2;
bios.TSK.create("TSK_RS");
bios.TSK.instance("TSK_RS").order = 5;
bios.TSK.instance("TSK_RS").stackSize = 4000;
bios.TSK.instance("TSK_RS").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk");
bios.TSK.create("TSK_SCR");
bios.TSK.instance("TSK_SCR").order = 7;
bios.TSK.instance("TSK_SCR").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_SCR").fxn = prog.extern("SCR_tsk");
bios.TSK.instance("TSK_SCR").priority = 2;
bios.TSK.instance("TSK_RS").priority = 2;
bios.TSK.instance("TSK_RS").stackSize = 8000;
bios.MEM.STACKSIZE = 0x0400;
bios.TSK.instance("TSK_SCR").destroy();
bios.TSK.instance("TSK_RS").order = 4;
bios.TSK.instance("TSK_FORNEY").destroy();
bios.TSK.instance("TSK_RS").destroy();
bios.TSK.create("TSK_FORNEY");
bios.TSK.instance("TSK_FORNEY").order = 4;
bios.TSK.instance("TSK_FORNEY").stackSize = 3000;
bios.TSK.instance("TSK_FORNEY").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_FORNEY").priority = 2;
bios.TSK.instance("TSK_FORNEY").fxn = prog.extern("forney_tsk");
bios.TSK.create("TSK_RS");
bios.TSK.instance("TSK_RS").order = 5;
bios.TSK.instance("TSK_RS").stackSize = 4000;
bios.TSK.instance("TSK_RS").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_RS").priority = 2;
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk");
bios.TSK.instance("TSK_RS").priority = 1;
bios.TSK.instance("TSK_VIT").order = 2;
bios.TSK.instance("TSK_FORNEY").order = 3;
bios.TSK.instance("TSK_RS").order = 4;
bios.TSK.instance("SRC_VIT").destroy();
bios.TSK.instance("TSK_RS").order = 3;
bios.TSK.instance("TSK_FORNEY").destroy();
bios.TSK.instance("TSK_RS").destroy();
bios.TSK.instance("TSK_VIT").destroy();
bios.TSK.create("SRC_VIT");
bios.TSK.instance("SRC_VIT").order = 3;
bios.TSK.instance("SRC_VIT").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("SRC_VIT").priority = 2;
bios.TSK.instance("SRC_VIT").fxn = prog.extern("tsk_source_Viterbi");
bios.TSK.create("TSK_VIT");
bios.TSK.instance("TSK_VIT").order = 4;
bios.TSK.instance("TSK_VIT").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_VIT").stackSize = 3000;
bios.TSK.instance("TSK_VIT").priority = 2;
bios.TSK.instance("TSK_VIT").fxn = prog.extern("tsk_viterbi");
bios.TSK.create("TSK_FORNEY");
bios.TSK.instance("TSK_FORNEY").order = 5;
bios.TSK.instance("TSK_FORNEY").priority = 2;
bios.TSK.instance("TSK_FORNEY").stackSize = 4000;
bios.TSK.instance("TSK_FORNEY").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_FORNEY").fxn = prog.extern("forney_tsk");
bios.TSK.create("TSK_RS");
bios.TSK.instance("TSK_RS").order = 6;
bios.TSK.instance("TSK_RS").stackSize = 4000;
bios.TSK.instance("TSK_RS").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_RS").priority = 2;
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk");
bios.TSK.instance("TSK_FORNEY").stackSize = 3000;
bios.TSK.instance("SRC_VIT").order = 2;
bios.TSK.instance("TSK_VIT").order = 3;
bios.TSK.instance("TSK_FORNEY").order = 4;
bios.TSK.instance("TSK_RS").destroy();
bios.TSK.create("TSK_RS");
bios.TSK.instance("TSK_RS").order = 6;
bios.TSK.instance("TSK_RS").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_RS").priority = 2;
bios.TSK.instance("TSK_RS").stackSize = 4000;
bios.TSK.instance("TSK_RS").fxn = prog.extern("RS_tsk");
bios.TSK.create("TSK_SCR");
bios.TSK.instance("TSK_SCR").order = 7;
bios.TSK.instance("TSK_SCR").fxn = prog.extern("SCR_tsk");
bios.TSK.instance("TSK_SCR").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_SCR").priority = 2;
bios.TSK.instance("TSK_RS").order = 5;
bios.TSK.instance("TSK_SCR").destroy();
bios.TSK.create("TSK_SCR");
bios.TSK.instance("TSK_SCR").order = 6;
bios.TSK.instance("TSK_SCR").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_SCR").fxn = prog.extern("SCR_tsk");
bios.TSK.create("TSK_VFG");
bios.TSK.instance("TSK_VFG").order = 7;
bios.TSK.instance("TSK_VFG").fxn = prog.extern("tsk_vitforglue");
bios.TSK.instance("TSK_VFG").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("SRC_VIT").stackSize = 2000;
bios.TSK.instance("TSK_SCR").priority = 2;
bios.TSK.instance("TSK_VFG").priority = 2;
bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").len = 0x00008000;
bios.MEM.instance("IRAM").heapSize = 0x00002000;
bios.MEM.instance("IRAM").heapSize = 0x00005000;
bios.MEM.instance("DDR2").heapSize = 0x00100000;
bios.MEM.instance("DDR2").heapSize = 0x00080000;
bios.TSK.instance("TSK_VIT").order = 2;
bios.TSK.instance("TSK_FORNEY").order = 3;
bios.TSK.instance("TSK_RS").order = 4;
bios.TSK.instance("TSK_SCR").order = 5;
bios.TSK.instance("TSK_VFG").order = 6;
bios.TSK.instance("SRC_VIT").destroy();
bios.TSK.create("TSK_SRC");
bios.TSK.instance("TSK_SRC").order = 8;
bios.TSK.instance("TSK_SRC").fxn = prog.extern("tsk_source_Viterbi");
bios.TSK.instance("TSK_SRC").priority = 2;
bios.TSK.instance("TSK_SRC").stackSize = 2000;
bios.TSK.instance("TSK_SRC").fxn = prog.extern("tsk_source");
bios.TSK.create("TSK_InnDeInt");
bios.TSK.instance("TSK_InnDeInt").order = 9;
bios.TSK.instance("TSK_InnDeInt").stackSize = 3000;
bios.TSK.instance("TSK_InnDeInt").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_InnDeInt").fxn = prog.extern("tsk_inner_deInterleaver");
bios.TSK.instance("TSK_InnDeInt").priority = 2;
bios.MEM.instance("DDR2").heapSize = 0x00800000;
bios.TSK.create("TSK_DMP");
bios.TSK.instance("TSK_DMP").order = 10;
bios.TSK.instance("TSK_DMP").stackSize = 3000;
bios.TSK.instance("TSK_DMP").fxn = prog.extern("tsk_inner_deInterleaver");
bios.TSK.instance("TSK_DMP").priority = 2;
bios.TSK.instance("TSK_DMP").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_DMP").priority = 1;
bios.TSK.instance("TSK_DMP").priority = 2;
bios.TSK.instance("TSK_DMP").fxn = prog.extern("tsk_DeMapper");
bios.TSK.instance("TSK_SRC").order = 7;
bios.TSK.instance("TSK_InnDeInt").order = 8;
bios.TSK.instance("TSK_DMP").destroy();
bios.TSK.instance("TSK_RS").order = 3;
bios.TSK.instance("TSK_SCR").order = 4;
bios.TSK.instance("TSK_VFG").order = 5;
bios.TSK.instance("TSK_SRC").order = 6;
bios.TSK.instance("TSK_InnDeInt").order = 7;
bios.TSK.instance("TSK_FORNEY").destroy();
bios.TSK.instance("TSK_InnDeInt").destroy();
bios.TSK.instance("TSK_SCR").order = 3;
bios.TSK.instance("TSK_VFG").order = 4;
bios.TSK.instance("TSK_SRC").order = 5;
bios.TSK.instance("TSK_RS").destroy();
bios.TSK.instance("TSK_VFG").order = 3;
bios.TSK.instance("TSK_SRC").order = 4;
bios.TSK.instance("TSK_SCR").destroy();
bios.TSK.instance("TSK_SRC").order = 3;
bios.TSK.instance("TSK_VFG").destroy();
bios.TSK.instance("TSK_SRC").order = 2;
bios.TSK.instance("TSK_VIT").destroy();
bios.TSK.create("TSK_DeMapp");
bios.TSK.instance("TSK_DeMapp").order = 3;
bios.TSK.instance("TSK_DeMapp").fxn = prog.extern("tsk_DeMapper");
bios.TSK.instance("TSK_DeMapp").stackSize = 3000;
bios.TSK.instance("TSK_DeMapp").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_DeMapp").priority = 2;
bios.TSK.create("TSK_InnDeInt");
bios.TSK.instance("TSK_InnDeInt").order = 4;
bios.TSK.instance("TSK_InnDeInt").fxn = prog.extern("Inner_Interleaving");
bios.TSK.instance("TSK_InnDeInt").stackSize = 3000;
bios.TSK.instance("TSK_InnDeInt").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_InnDeInt").priority = 2;
bios.TSK.instance("TSK_InnDeInt").fxn = prog.extern("tsk_inner_deInterleaver");
bios.TSK.create("TSK_Vit");
bios.TSK.instance("TSK_Vit").order = 5;
bios.TSK.instance("TSK_Vit").fxn = prog.extern("tsk_viterbi");
bios.TSK.instance("TSK_Vit").stackSize = 3000;
bios.TSK.instance("TSK_Vit").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_Vit").priority = 2;
bios.TSK.create("TSK_VFG");
bios.TSK.instance("TSK_VFG").order = 6;
bios.TSK.instance("TSK_VFG").fxn = prog.extern("tsk_vitforglue");
bios.TSK.instance("TSK_VFG").stackSize = 3000;
bios.TSK.instance("TSK_VFG").stackMemSeg = prog.get("DDR2");
bios.TSK.instance("TSK_VFG").priority = 2;
bios.TSK.create("TSK_1");
bios.TSK.instance("TSK_1").order = 7;
bios.TSK.instance("TSK_InnDeInt").order = 3;
bios.TSK.instance("TSK_Vit").order = 4;
bios.TSK.instance("TSK_VFG").order = 5;
bios.TSK.instance("TSK_1").order = 6;
bios.TSK.instance("TSK_DeMapp").destroy();
bios.TSK.instance("TSK_InnDeInt").order = 2;
bios.TSK.instance("TSK_Vit").order = 3;
bios.TSK.instance("TSK_VFG").order = 4;
bios.TSK.instance("TSK_1").order = 5;
bios.TSK.instance("TSK_SRC").destroy();
bios.TSK.instance("TSK_Vit").order = 2;
bios.TSK.instance("TSK_VFG").order = 3;
bios.TSK.instance("TSK_1").order = 4;
bios.TSK.instance("TSK_InnDeInt").destroy();
bios.TSK.instance("TSK_1").order = 3;
bios.TSK.instance("TSK_VFG").destroy();
bios.TSK.instance("TSK_1").order = 2;
bios.TSK.instance("TSK_Vit").destroy();
bios.TSK.instance("TSK_1").destroy();
bios.TSK.create("TSK_PRIMERA");
bios.TSK.instance("TSK_PRIMERA").order = 3;
bios.TSK.instance("TSK_PRIMERA").fxn = prog.extern("TASK_PRIMERA");
bios.TSK.instance("TSK_PRIMERA").destroy();
bios.TSK.create("TSK_primera");
bios.TSK.instance("TSK_primera").order = 3;
bios.TSK.instance("TSK_primera").fxn = prog.extern("task_primera");
bios.PRD.create("PRD0");
bios.PRD.instance("PRD0").order = 1;
bios.PRD.instance("PRD0").period = 1;
bios.PRD.instance("PRD0").fxn = prog.extern("showTicks");
bios.TSK.instance("TSK_primera").destroy();
bios.PRD.instance("PRD0").fxn = prog.extern("showTicks", "asm");
bios.PRD.instance("PRD0").fxn = prog.extern("showTicks");
bios.PRD.instance("PRD0").destroy();
bios.PRD.create("prdClock0");
bios.PRD.instance("prdClock0").order = 2;
bios.PRD.instance("prdClock0").fxn = prog.extern("showTicks");
bios.PRD.instance("prdClock0").period = 1;
bios.PRD.instance("prdClock0").fxn = prog.extern("clockPrd");
bios.PRD.instance("prdClock0").destroy();
bios.PRD.USECLK = 0;
bios.PRD.MICROSECONDS = 1.0;
bios.CLK.RESETTIMER = 1;
bios.CLK.RESETTIMER = 0;
bios.CLK.TIMMODE = "32-bit chained";
bios.CLK.RESETTIMER = 1;
bios.CLK.instance("PRD_clock").order = 1;
bios.PRD.USECLK = 1;
bios.PRD.create("PRD_clock0");
bios.PRD.instance("PRD_clock0").order = 1;
bios.PRD.instance("PRD_clock0").period = 1;
bios.PRD.instance("PRD_clock0").fxn = prog.extern("prdclock");
bios.PRD.instance("PRD_clock0").fxn = prog.extern("clockPrd");
bios.PRD.instance("PRD_clock0").destroy();
bios.PRD.create("PRD0");
bios.PRD.instance("PRD0").order = 2;
bios.PRD.instance("PRD0").fxn = prog.extern("gettimeofday", "asm");
bios.PRD.instance("PRD0").period = 1;
bios.PRD.instance("PRD0").period = 4;
bios.PRD.instance("PRD0").fxn = prog.extern("my_prd", "asm");
bios.PRD.instance("PRD0").fxn = prog.extern("my_prd");
bios.CLK.RESETTIMER = 0;
bios.CLK.TIMMODE = "32-bit chained";
bios.CLK.TIMMODE = "32-bit unchained";
bios.CLK.RESETTIMER = 1;
bios.CLK.TIMMODE = "32-bit chained";
bios.CLK.TIMMODE = "32-bit unchained";
bios.CLK.TIMERSELECT = "Timer 0";
bios.CLK.CONFIGURETIMER = 0;
bios.CLK.CONFIGURETIMER = 1;
bios.CLK.CONFIGURETIMER = 0;
bios.PRD.instance("PRD0").destroy();
bios.PRD.create("prdClock0");
bios.PRD.instance("prdClock0").order = 3;
bios.PRD.instance("prdClock0").period = 4;
bios.PRD.instance("prdClock0").fxn = prog.extern("my_prd");
bios.CLK.MICROSECONDS = 50.0000;
bios.PRD.instance("prdClock0").period = 1000;
// !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!
prog.gen();
Hello
I think I have found out the source of the problem but i dont really know how to fix it,
in the tcf file I have load the platform evdm6446. When you are working on simulation mode,
with this plaform HWI produced by the timer doesnt work,, what is the reason for that?
Miguel,
From what I have seen sometimes the simulators do not simulate the timers properly. I am not sure if this is the case with whichever simulator you are using but that potentially be a problem. Have you tried doing this in a small test-case project to see if it works? This is what I do to see if the problem is with my full code base or with the simulator itself.
