Part Number: PROCESSOR-SDK-AM57X
Hello, my question specifically concerns idkAM571x_clock.c in the AM57x PDK (latest processor SDK RTOS release). The Board_moduleClockInit() function in this file writes to the following "_CLKCTRL" registers:
- Line 270: CM_DMA_DMA_SYSTEM_CLKCTRL
- Line 277: CM_EMIF_DMM_CLKCTRL
- Line 298: CM_EMIF_EMIF_OCP_FW_CLKCTRL
- Line 319: CM_L3MAIN1_L3_MAIN_1_CLKCTRL
- Line 326: CM_L3MAIN1_MMU_EDMA_CLKCTRL
- Line 333: CM_L3MAIN1_MMU_PCIESS_CLKCTRL
- Line 340: CM_L3MAIN1_OCMC_RAM1_CLKCTRL
- Line 347: CM_L3MAIN1_OCMC_RAM2_CLKCTRL
- Line 354: CM_L3MAIN1_OCMC_RAM3_CLKCTRL
- Line 361: CM_L3MAIN1_OCMC_ROM_CLKCTRL
- Line 368: CM_L3MAIN1_TPCC_CLKCTRL
- Line 404: CM_L4CFG_L4_CFG_CLKCTRL
- Line 411: CM_L4CFG_MAILBOX1_CLKCTRL (and mailboxes 2-13)
- Line 502: CM_L4CFG_SPINLOCK_CLKCTRL
- Line 558: CM_L4PER2_L4_PER2_CLKCTRL
- Line 565: CM_L4PER3_L4_PER3_CLKCTRL
- Line 649: CM_L4PER_L4_PER1_CLKCTRL
I'm confused because the AM571x TRM indicates that these registers are read-only. Is the TRM correct?
Thanks for the clarification,
Dave
